Fairchild Semiconductor Power33 Package Power MOSFET Solution in Multi-Cell Battery Protection Applications

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Fairchild Semiconductor Power33 Package
Power MOSFET Solution in Multi-Cell
Battery Protection Applications
1. Introduction
This paper introduces Power33 MOSFET package
technology from Fairchild Semiconductor. Small Power33
packaging provides extremely low resistance, reduces power
loss, and provides thermally-enhanced performance. This
note compares the Power33 package to SO-8 packages
through a review of MOSFET technology and performance
comparison in multi-cell battery-protection applications.
2. Overview of Multi-Cell Battery
Protection Circuit Module (PCM)
Figure 1 and Figure 2 show a simplified battery-pack
configuration and charge/discharge profile. Li-Ion multi-cell
battery packs usually use a constant current and constant
voltage method for charging operations. Once the Li-Ion
cell voltage has charged to an internally set 4.2V level, the
system begins to reduce the current to maintain the desired
floating voltage while changing to constant voltage
operation. For discharging operations, this process is
reversed. To prevent over-charging or a drop in cell voltage
(cell damage level), protection ICs set the maximum and
under-voltage limits (internal voltage reference) that protect
the system as well as the battery pack.
Figure 1. 3-Cell Battery-Pack Configuration
Capacity
Current
Capacity (% percent)
Voltage
Cell Voltage (V)
Smart battery safety circuits consist of a battery protection
circuit and a run-time prediction and communication IC
with one or more cells in series. They are designed to
provide protection for battery packs by using a pair of
MOSFET switches with a common drain. For laptops with a
lithium ion (Li-Ion) battery, P-channel MOSFET devices
have been the dominant solution, but N-channel MOSFET
devices are becoming popular because of their lower RSP
(die size x RDS(ON)). An N-channel MOSFET normally has
higher mobility, allowing it to achieve lower RDS(ON) with
the same die size.[1] It can reduce the power MOSFET
footprint, enabling the Battery Management Unit (BMU)
design to be size-optimized.
Figure 2. Li-Ion Charge / Discharge Profile
3. MOSFET Requirement in PCM
A MOSFET’s key requirements in PCM are summarized
and compared with a switching power MOSFET in
notebook applications, as shown in Table 1.
The selection of a power MOSFET in PCM depends on
many factors and the importance of each of them to the
design. These include:
Lower RDS(ON): Enables Extended Battery Life (EBL) and
higher circuit efficiency.
Pulse Current Capability: This is critical to meet 200A/ms
pulse current discharging specifications established by
battery-pack manufacturers from a silicon - package aspect.
Smaller Package with Lower RΘJA: Enables the PCM to
use less board space and improves thermal performance.
© 2012 Fairchild Semiconductor Corporation
Rev. 1.0.0 • 7/18/12
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AN-9762
Table 1.
APPLICATION NOTE
Table 3.
MOSFET Requirement by Applications
▲ Required / ● Critical
Notebook
▲
●
Pulse Current Capability
▲
●
RΘJA
▲
●
Size
▲
●
ESD
●
●
On Resistance, RDS(ON)
●
●
Parasitic L, C (Ls/Lg or Cgs/Cgd/Cds)
●
▲
Type
30mm
Power33
2
50°C/W
10.9mm
2
53°C/W
The lower thermal resistance (RΘJA, junction–to-ambient) in
steady-state condition represents higher drain current and
power dissipation, which results in much more efficient
system design. A Power33-packaged device occupies less
than half the footprint area of an SO-8 package, which
allows design of a smaller PCM board.
5. Thermal Performance Verification
Verification was conducted to compare the thermal
performance between industry-standard Power33 and SO-8
packages. To highlight the effect of the package type on
battery protection circuits, two similar RDS(ON) power
MOSFET pairs were chosen, as shown in Table 4.
Figure 3. RSP and Package Trend
30V MOSFET Parameter
Package
Typ. RDS(ON)
RΘJA
(1in2, 2oz
Board)
ID[A]
SO-8
Power33
3.8mΩ
3.6mΩ
60°C/W
53°C/W
18.5
18.8
The thermal capability evaluation method used complies
with the three-series cell discharging condition, which has a
9V cell voltage and 7A, 8A, 9A, and 10A; which is
considered the worst-case discharging condition on a
double-side FR-4 PCB. The graph in Figure 4 compares the
power dissipation performance of a Power33 package to that
of an SO-8 package on a PCM evaluation board. Power
dissipation steps in each device and the case temperature
were measured. The Power33 package shows similar
thermal performance at all reference points in spite of its
smaller package size.
To meet the demand for higher power density devices in
smaller packages, Fairchild Semiconductor offers a variety
of 30V Power33 products to replace SO-8-packaged
devices, as shown in Table 2.
Fairchild 30V Product Portfolios
Number of Products
with RDS(ON)≤6mΩ
Case Temperature (°C)
Power33
When considering changing package type, engineers must
take into account the change in MOSFET RDS(ON) associated
with the size, as well as the thermal capability of the
package. Table 3 shows the internal structures of each
package. The Power Quad Flat No-Lead (PQFN) package
has superior thermal capability compared to an SO-8
because of the leadless and exposed bottom area that
provides a direct thermal path and lower thermal resistance
when the device is mounted to PCB.
© 2012 Fairchild Semiconductor Corporation
Rev. 1.0.0 • 7/18/12
60°C/W
Power56
Table 4.
Power56
2
3D View
SO-8
As batteries get smaller and thinner, the protection circuits
attached to the battery cells should follow suit.[2] An SO-8
package power MOSFET has been the main player for LiIon battery-protection circuits. However, its thermal
capability, RDS(ON), and size constraints are at their limit
because of the SO-8 package’s lead construction. To meet
power density and size constraints, many power
semiconductor manufacturers have increased the silicon
power density and introduced new packages, such as
Power56 and Power33, as shown Figure 3.
SO-8
Area
30mm
4. Thermally-Enhanced Power33
Package Solution
Package Type
RΘJA
2
(1in , 2oz
Board)
PCM
BVDSS
Table 2.
Footprint Area Comparison
Power Dissipation (W)
Figure 4. Thermal Performance, SO-8 vs. Power33
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AN-9762
APPLICATION NOTE
Table 5 provides information on Fairchild’s Power33
packaged MOSFETs by PCM power dissipation of less than
70°C, the case-temperature limit. Design engineers working
on battery-pack protection should select a power MOSFET
based on thermal capability for circuit efficiency.
6. Design Guidelines for Power33
Package
This section discusses the guidelines for using a device in
the Power33 package.
Table 5. 30V N-Channel Selection Guide by
Power Dissipation
Figure 5 shows a board space comparison between the SO-8
and Power33 packages. The Power33 package enables
board-space savings of up to 70 percent.
2
10.9mm
30mm2
Figure 5. Real PCM Board
Part No.
Typ. RDS(ON)
Battery Pack PdMAX
FDMC7660
FDMC7664
FDMC7672
FDMC7678
FDMC7692
1.8
3.6
4.3
5.3
7.2
90W
80W
70W
60W
<50W
(10VGS [mΩ])
(TC < 70°C at 25°C)
7. Conclusion
The application note AN-9040 — Assembly Guidelines for
Power33 Packaging[3] provides information on Power33
packages’ ability to achieve SO-8-type performance in a
small form factor. Due to the smaller package size, it is
necessary for designers to be aware of stencil and via
design, which can allow the engineer to achieve 25 percent
or less voiding for Power33 packages, as shown in Figure 6.
The low-profile Power33-packaged MOSFET performance
for battery protection has been demonstrated and compared
to SO-8-packaged devices. By minimizing thermal rise and
saving board space, while keeping the RDS(ON) low and
allowing same-current capability; this package simplifies
PCM board design.
Author
Dongsup Eom – LV Applications Engineer
Figure 6. Assembly Guideline
References
[1]
[2]
[3]
“Bi-Directional FlipFET MOSFETs for Cell Phone Battery Protection Circuits”, Mark Pavier, Hazel Schofield,
Tim Sammon, Aram Arumanyan, Ritu sodi, PCIM 2001.
“New Thermally Enhanced Packages for Power MOSFETs in Battery Applications”, Yalcin Bulut. IEEE 2004.
“AN-9040 Assembly Guidelines for Power33 Packaging”, Dennis Lang, Fairchild Semiconductor.
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1.
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when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to
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© 2012 Fairchild Semiconductor Corporation
Rev. 1.0.0 • 7/18/12
2.
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system, or to affect its safety or effectiveness.
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