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Dual Low Bias Current Precision Operational Amplifier OP297

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Dual Low Bias Current Precision Operational Amplifier OP297
Dual Low Bias Current
Precision Operational Amplifier
OP297
PIN CONFIGURATION
Low offset voltage: 50 μV maximum
Low offset voltage drift: 0.6 μV/°C maximum
Very low bias current: 100 pA maximum
Very high open-loop gain: 2000 V/mV minimum
Low supply current (per amplifier): 625 μA maximum
Operates from ±2 V to ±20 V supplies
High common-mode rejection: 120 dB minimum
8
V+
7
OUTB
+INA 3
6
–INB
V– 4
5
+INB
OUTA 1
–INA 2
A
B
00300-001
FEATURES
Figure 1.
APPLICATIONS
60
VS = ±15V
VCM = 0V
40
INPUT CURRENT (pA)
20
I B–
0
I B+
–20
IOS
www.BDTIC.com/ADI
GENERAL DESCRIPTION
–60
–75
The OP297 is the first dual op amp to pack precision performance into the space saving, industry-standard 8-lead SOIC
package. The combination of precision with low power and
extremely low input bias current makes the dual OP297 useful
in a wide variety of applications.
Errors due to common-mode signals are eliminated by the
common-mode rejection of over 120 dB, which minimizes
offset voltage changes experienced in battery-powered systems.
The supply current of the OP297 is under 625 μA.
The OP297 uses a super-beta input stage with bias current
cancellation to maintain picoamp bias currents at all temperatures. This is in contrast to FET input op amps whose bias
currents start in the picoamp range at 25°C, but double for
every 10°C rise in temperature, to reach the nanoamp range
above 85°C. Input bias current of the OP297 is under 100 pA at
25°C and is under 450 pA over the military temperature range
per amplifier. This part can operate with supply voltages as low
as ±2 V.
–25
0
25
50
TEMPERATURE (°C)
75
100
125
Figure 2. Low Bias Current over Temperature
400
1200 UNITS
TA = 25°C
VS = ±15V
VCM = 0V
300
NUMBER OF UNITS
Precision performance of the OP297 includes very low offset
(less than 50 μV) and low drift (less than 0.6 μV/°C). Openloop gain exceeds 2000 V/mV, ensuring high linearity in every
application.
–50
00300-002
–40
200
100
0
–100 –80
–60
–40
–20
0
20
40
INPUT OFFSET VOLTAGE (µV)
60
80
100
00300-003
Strain gage and bridge amplifiers
High stability thermocouple amplifiers
Instrumentation amplifiers
Photocurrent monitors
High gain linearity amplifiers
Long-term integrators/filters
Sample-and-hold amplifiers
Peak detectors
Logarithmic amplifiers
Battery-powered systems
Figure 3. Very Low Offset
Combining precision, low power, and low bias current, the
OP297 is ideal for a number of applications, including instrumentation amplifiers, log amplifiers, photodiode preamplifiers,
and long term integrators. For a single device, see the OP97; for
a quad device, see the OP497.
Rev. G
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2008 Analog Devices, Inc. All rights reserved.
OP297
TABLE OF CONTENTS
Features .............................................................................................. 1 AC Performance ............................................................................9 Applications ....................................................................................... 1 Guarding and Shielding ................................................................9 General Description ......................................................................... 1 Open-Loop Gain Linearity ....................................................... 10 Pin Configuration ............................................................................. 1 Application Circuits ....................................................................... 11 Revision History ............................................................................... 2 Precision Absolute Value Amplifier ......................................... 11 Specifications..................................................................................... 3 Precision Current Pump ............................................................ 11 Electrical Characteristics ............................................................. 3 Precision Positive Peak Detector .............................................. 11 Absolute Maximum Ratings............................................................ 4 Simple Bridge Conditioning Amplifier ................................... 11 Thermal Resistance ...................................................................... 4 Nonlinear Circuits ...................................................................... 12 ESD Caution .................................................................................. 4 Outline Dimensions ....................................................................... 13 Typical Performance Characteristics ............................................. 5 Ordering Guide .......................................................................... 14 Applications Information ................................................................ 9 REVISION HISTORY
4/08—Rev. F to Rev. G
Changes to Table 2 Conditions ....................................................... 3
Changes to Table 2 Power Supply Rejection Parameter .............. 3
Changes to Figure 5, Figure 6, Figure 7 ......................................... 5
Changes to Figure 16 ........................................................................ 6
Updated Outline Dimensions ....................................................... 13
Changes to Ordering Guide .......................................................... 14
10/02—Rev. C to Rev. D
Edits to Figure 16 ...............................................................................6
10/02—Rev. B to Rev. C
Edits to Specifications .......................................................................2
Deleted Wafer Test Limits ................................................................3
Deleted Dice Characteristics ............................................................3
Deleted Absolute Maximum Ratings ..............................................4
Edits to Ordering Guide ...................................................................4
Updated Outline Dimensions ....................................................... 12
www.BDTIC.com/ADI
2/06—Rev. E to Rev. F
Updated Format .................................................................. Universal
Changes to Features.......................................................................... 1
Deleted OP297 Spice Macro Model Section ................................. 9
Updated Outline Dimensions ....................................................... 13
Changes to Ordering Guide .......................................................... 14
7/03—Rev. D to Rev. E
Changes to TPCs 13 and 16 ............................................................ 4
Edits to Figures 12 and 14 ............................................................... 8
Changes to Nonlinear Circuits Section ......................................... 8
Rev. G | Page 2 of 16
OP297
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
@ VS = ±15 V, TA = 25°C, unless otherwise noted.
Table 1.
Parameter
Input Offset Voltage
Long-Term Input Voltage
Stability
Input Offset Current
Input Bias Current
Input Noise Voltage
Input Noise Voltage Density
Symbol
VOS
Conditions
IOS
IB
en p-p
en
Input Noise Current Density
Input Resistance
Differential Mode
Common-Mode
Large Signal Voltage Gain
in
VCM = 0 V
VCM = 0 V
0.1 Hz to 10 Hz
fOUT = 10 Hz
fOUT = 1000 Hz
fOUT = 10 Hz
RIN
RINCM
AVO
Input Voltage Range 1
Common-Mode Rejection
Power Supply Rejection
VCM
CMRR
PSRR
Output Voltage Swing
Supply Current per Amplifier
Supply Voltage
Slew Rate
Gain Bandwidth Product
Channel Separation
VCM = ±13 V
VS = ±2 V to
±20 V
RL = 10 kΩ
RL = 2 kΩ
No load
Operating range
OP297E
Typ
Max
25
50
0.1
20
+20
0.5
20
17
20
2000
30
500
4000
±13
120
120
±14
140
130
Min
100
±100
OP297F
Typ
Max
50
100
0.1
35
+35
0.5
20
17
20
1500
30
500
3200
±13
114
114
±14
135
125
Min
150
±150
VOUT
ISY
VS
SR
GBWP
CS
±13
±13
±2
0.05
AV = +1
VOUT = 20 V p-p,
fOUT = 10 Hz
CIN
±14
±13.7
525
±13
±13
625
±20
0.15
500
150
±2
0.05
3
±14
±13.7
525
0.15
500
150
Unit
μV
μV/month
200
±200
pA
pA
μV p-p
nV/√Hz
nV/√Hz
fA/√Hz
1200
30
500
3200
MΩ
GΩ
V/mV
±13
114
114
±14
135
125
V
dB
dB
±14
±13.7
525
0.15
500
150
V
V
μA
V
V/μs
kHz
dB
3
pF
±13
±13
625
±20
OP297G
Typ
Max
80
200
0.1
50
+50
0.5
20
17
20
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Input Capacitance
1
VOUT = ±10 V,
RL = 2 kΩ
Min
±2
0.05
3
625
±20
Guaranteed by CMR test.
@ VS = ±15 V, −40°C ≤ TA ≤ +85°C, unless otherwise noted.
Table 2.
Parameter
Input Offset Voltage
Average Input Offset Voltage Drift
Input Offset Current
Input Bias Current
Large Signal Voltage Gain
Symbol
VOS
TCVOS
IOS
IB
AVO
Input Voltage Range 1
Common-Mode Rejection
Power Supply Rejection
VCM
CMRR
PSRR
Output Voltage Swing
Supply Current per Amplifier
Supply Voltage
VOUT
ISY
VS
1
Conditions
VCM = 0 V
VCM = 0 V
VOUT = ±10 V,
RL = 2 kΩ
VCM = ±13
VS = ±2.5 V to
±20 V
RL = 10 kΩ
No load
Operating range
OP297E
Typ
35
0.2
50
+50
1200 3200
Min
±13
114
114
±13.5
130
±13
±13.4
550
±2.5
Guaranteed by CMR test.
Rev. G | Page 3 of 16
Max
100
0.6
450
±450
750
±20
OP297F
Typ
80
0.5
80
+80
1000 2500
Min
±13
108
108
±13.5
130
±13
±13.4
550
±2.5
Max
300
2.0
750
±750
Min
800
750
±20
OP297G
Typ
110
0.6
80
+80
2500
±13
108
108
±13.5
130
±13
±13.4
550
±2.5
Max
400
2.0
750
±750
Unit
μV
μV/°C
pA
pA
V/mV
V
dB
dB
750
±20
V
μA
V
OP297
ABSOLUTE MAXIMUM RATINGS
THERMAL RESISTANCE
Table 3.
Parameter
Supply Voltage
Input Voltage1
Differential Input Voltage1
Output Short-Circuit Duration
Storage Temperature Range
Z-Suffix
P-Suffix, S-Suffix
Operating Temperature Range
OP297E (Z-Suffix)
OP297F, OP297G (P-Suffix, S-Suffix)
Junction Temperature
Z-Suffix
P-Suffix, S-Suffix
Lead Temperature (Soldering, 60 sec)
1
Rating
±20 V
±20 V
40 V
Indefinite
θJA is specified for worst-case mounting conditions, that is, θJA
is specified for device in socket for CERDIP and PDIP packages; θJA is specified for device soldered to printed circuit board
for the SOIC package.
−65°C to +175°C
−65°C to +150°C
Package Type
8-Lead CERDIP (Z-Suffix)
8-Lead PDIP (P-Suffix)
8-Lead SOIC (S-Suffix)
Table 4. Thermal Resistance
−40°C to +85°C
−40°C to +85°C
θJA
134
96
150
ESD CAUTION
−65°C to +175°C
−65°C to +150°C
300°C
For supply voltages less than ±20 V, the absolute maximum input voltage is
equal to the supply voltage.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
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–
1/2
OP297
+
V1 20V p-p @ 10Hz
2kΩ
50kΩ
50Ω
–
1/2
OP297
V2
CHANNEL SEPARATION = 20 log
V1
V2/10000
Figure 4. Channel Separation Test Circuit
Rev. G | Page 4 of 16
00300-004
+
θJC
12
37
41
Unit
°C/W
°C/W
°C/W
OP297
TYPICAL PERFORMANCE CHARACTERISTICS
400
60
VS = ±15V
VCM = 0V
TA = 25°C
VS = ±15V
VCM = 0V
1200 UNITS
40
INPUT CURRENT (pA)
NUMBER OF UNITS
300
200
20
IB–
0
IB+
–20
IOS
100
–80
–60
–40 –20
0
20
40
INPUT OFFSET VOLTAGE (µV)
60
80
100
–60
–75
00300-005
0
–100
Figure 5. Typical Distribution of Input Offset Voltage
0
25
50
TEMPERATURE (°C)
75
100
125
60
TA = 25°C
VS = ±15V
VCM = 0V
1200 UNITS
VS = ±15V
VCM = 0V
40
INPUT CURRENT (pA)
200
IB–
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150
100
50
20
IB+
0
IOS
–80
–60
–40 –20
0
20
40
INPUT BIAS CURRENT (pA)
60
80
100
–40
–15
00300-006
0
–100
Figure 6. Typical Distribution of Input Bias Current
±3
DEVIATION FROM FINAL VALUE (µV)
TA = 25°C
VS = ±15V
VCM = 0V
300
200
100
–80
–60
–40 –20
0
20
40
INPUT OFFSET CURRENT (pA)
60
80
100
10
15
Figure 7. Typical Distribution of Input Offset Current
TA = 25°C
VS = ±15V
VCM = 0V
±2
±1
0
00300-007
0
–100
–5
0
5
COMMON-MODE VOLTAGE (V)
Figure 9. Input Bias, Offset Current vs. Common-Mode Voltage
400
1200 UNITS
–10
00300-009
–20
0
1
2
3
4
TIME AFTER POWER APPLIED (Minutes)
Figure 10. Input Offset Voltage Warm-Up Drift
Rev. G | Page 5 of 16
5
00300-010
NUMBER OF UNITS
–25
Figure 8. Input Bias, Offset Current vs. Temperature
250
NUMBER OF UNITS
–50
00300-008
–40
OP297
10k
1300
NO LOAD
TOTAL SUPPLY CURRENT (µA)
1k
100
–55°C ≤ TA ≤ +125°C
TA = +125°C
1100
TA = +25°C
1000
TA = –55°C
900
10
100
1k
10k
100k
1M
10M
800
SOURCE RESISTANCE (Ω)
0
±15
±20
160
COMMON-MODE REJECTION (dB)
BALANCED OR UNBALANCED
VS = ±15V
VCM = 0V
10
TA = 25°C
VS = ±15V
140
120
100
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0.1
100
1k
10k
100k
1M
10M
100M
SOURCE RESISTANCE (Ω)
80
60
40
1
10
100
1k
10k
FREQUENCY (Hz)
100k
1M
00300-015
1
00300-012
EFFECTIVE OFFSET VOLTAGE DRIFT (µV/°C)
100
Figure 15. Common-Mode Rejection vs. Frequency
Figure 12. Effective TCVOS vs. Source Resistance
160
35
30
TA = –55°C
POWER SUPPLY REJECTION (dB)
25
TA = +25°C
20
15
TA = +125°C
10
VS = ±15V
OUTPUT SHORTED
TO GROUND
5
0
–5
–10
–15
TA = +125°C
–20
TA = +25°C
–25
TA = 25°C
VS = ±15V
ΔVS = 10V p-p
140
120
100
80
60
40
TA = –55°C
–30
0
1
2
3
TIME FROM OUTPUT SHORT (Minutes)
4
20
0.1
00300-013
SHORT-CIRCUIT CURRENT (mA)
±10
SUPPLY VOLTAGE (V)
Figure 14. Total Supply Current vs. Supply Voltage
Figure 11. Effective Offset Voltage vs. Source Resistance
–35
±5
00300-014
TA = +25°C
00300-011
10
1200
1
10
100
1k
FREQUENCY (Hz)
10k
100k
Figure 16. Power Supply Rejection vs. Frequency
Figure 13. Short-Circuit Current vs. Time, Temperature
Rev. G | Page 6 of 16
1M
00300-016
EFFECTIVE OFFSET VOLTAGE (µV)
BALANCED OR UNBALANCED
VS = ±15V
VCM = 0V
OP297
1k
VOLTAGE
NOISE
1
10
1
10
1
1k
100
FREQUENCY (Hz)
TA = +125°C
TA = +25°C
0
TA = –55°C
–15
35
OUTPUT SWING (V p-p)
30
1kHz
0.01
100
15
25
TA = 25°C
VS = ±15V
AVCL = +1
1% THD
fOUT = 1kHz
20
15
10
10k
100k
SOURCE RESISTANCE (Ω)
1M
10M
0
10
100
1k
LOAD RESISTANCE (Ω)
35
TA = –55°C
TA = +25°C
VS = ±15V
VOUT = ±10V
TA = 25°C
VS = ±15V
AVCL = +1
1% THD
fOUT = 1kHz
RL = 10kΩ
30
OUTPUT SWING (V p-p)
10k
10k
Figure 21. Output Swing vs. Load Resistance
Figure 18. Total Noise Density vs. Source Resistance
TA = +125°C
1k
25
20
15
10
100
1
2
3
4
5 6 7 8 9 10
LOAD RESISTANCE (kΩ)
20
0
100
1k
10k
FREQUENCY (Hz)
Figure 22. Maximum Output Swing vs. Frequency
Figure 19. Open-Loop Gain vs. Load Resistance
Rev. G | Page 7 of 16
100k
00300-022
5
00300-019
OPEN-LOOP GAIN (V/mV)
10
5
10Hz
1k
5
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0.1
00300-018
TOTAL NOISE DENSITY (nV/√Hz)
TA = 25°C
VS = ±2V TO ±20V
1kHz
0
Figure 20. Differential Input Voltage vs. Output Voltage
10
10Hz
–5
OUTPUT VOLTAGE (V)
Figure 17. Voltage Noise Density and Current Noise Density vs. Frequency
1
–10
00300-021
10
RL = 10kΩ
VS = ±15V
VCM = 0V
00300-020
CURRENT
NOISE
CURRENT NOISE DENSITY (fA/√Hz)
100
100
DIFFERENTIAL INPUT VOLTAGE (10µV/DIV)
TA = 25°C
VS = ±2V TO ±15V
00300-017
VOLTAGE NOISE DENSITY (nV/√Hz)
1k
OP297
1k
100
VS = ±15V
CL = 30pF
RL = 1MΩ
60
PHASE
40
TA = 25°C
VS = ±15V
100
90
TA = –55°C
20
135
0
180
10
1
0.1
0.01
225
–20
OUTPUT IMPEDANCE (Ω)
OPEN-LOOP GAIN (dB)
GAIN
PHASE SHIFT (Degrees)
80
1k
10k
100k
FREQUENCY (Hz)
1M
270
10M
Figure 23. Open-Loop Gain, Phase vs. Frequency
0.001
10
100
1k
10k
FREQUENCY (Hz)
Figure 25. Open-Loop Output Impedance vs. Frequency
70
TA = 25°C
VS = ±15V
AVCL = +1
VOUT = 100mV p-p
60
–EDGE
40
+EDGE
30
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20
10
0
10
100
1k
LOAD CAPACITANCE (pF)
10k
00300-024
OVERSHOOT (%)
50
100k
Figure 24. Small Signal Overshoot vs. Load Capacitance
Rev. G | Page 8 of 16
1M
00300-025
–40
100
00300-023
TA = +125°C
OP297
APPLICATIONS INFORMATION
Extremely low bias current over a wide temperature range
makes the OP297 attractive for use in sample-and-hold
amplifiers, peak detectors, and log amplifiers that must operate
over a wide temperature range. Balancing input resistances is
unnecessary with the OP297. Offset voltage and TCVOS are
degraded only minimally by high source resistance, even
when unbalanced.
100
90
The input pins of the OP297 are protected against large differential voltage by back-to-back diodes and current-limiting resistors.
Common-mode voltages at the inputs are not restricted and can
vary over the full range of the supply voltages used.
AC PERFORMANCE
The ac characteristics of the OP297 are highly stable over its full
operating temperature range. Unity gain small signal response is
shown in Figure 26. Extremely tolerant of capacitive loading on
the output, the OP297 displays excellent response with 1000 pF
loads (see Figure 27).
20mV
5µs
00300-028
The OP297 requires very little operating headroom about the
supply rails and is specified for operation with supplies as low as
2 V. Typically, the common-mode range extends to within 1 V
of either rail. The output typically swings to within 1 V of the
rails when using a 10 kΩ load.
10
0%
Figure 28. Large Signal Transient Response (AVCL = +1)
GUARDING AND SHIELDING
To maintain the extremely high input impedances of the OP297,
care is taken in circuit board layout and manufacturing. Board
surfaces must be kept scrupulously clean and free of moisture.
Conformal coating is recommended to provide a humidity
barrier. Even a clean PCB can have 100 pA of leakage currents
between adjacent traces, therefore guard rings should be used
around the inputs. Guard traces operate at a voltage close to that
on the inputs, as shown in Figure 29, to minimize leakage
currents. In noninverting applications, the guard ring should be
connected to the common-mode voltage at the inverting input.
In inverting applications, both inputs remain at ground, so the
guard trace should be grounded. Guard traces should be placed
on both sides of the circuit board.
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100
90
NONINVERTING AMPLIFIER
UNITY-GAIN FOLLOWER
10
10
–
–
+
+
1/2
OP297
20mV
5µs
00300-026
0%
1/2
OP297
Figure 26. Small Signal Transient Response (CL = 100 pF, AVCL = +1)
MINI-DIP
BOTTOM VIEW
INVERTING AMPLIFIER
8
100
1
A
90
–
1/2
OP297
B
00300-029
+
Figure 29. Guard Ring Layout and Considerations
10
20mV
5µs
00300-027
0%
Figure 27. Small Signal Transient Response (CL = 1000 pF, AVCL = +1)
Rev. G | Page 9 of 16
The OP297 has both an extremely high gain of 2000 V/mV
minimum and constant gain linearity. This enhances the
precision of the OP297 and provides for very high accuracy in
high closed-loop gain applications. Figure 30 illustrates the
typical open-loop gain linearity of the OP297 over the military
temperature range.
RL = 10kΩ
VS = ±15V
VCM = 0V
TA = +125°C
TA = +25°C
0
TA = –55°C
–15
–10
–5
0
5
10
OUTPUT VOLTAGE (V)
Figure 30. Open-Loop Linearity of the OP297
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Rev. G | Page 10 of 16
15
00300-030
OPEN-LOOP GAIN LINEARITY
DIFFERENTIAL INPUT VOLTAGE (10µV/DIV)
OP297
OP297
APPLICATION CIRCUITS
PRECISION ABSOLUTE VALUE AMPLIFIER
PRECISION POSITIVE PEAK DETECTOR
The circuit in Figure 31 is a precision absolute value amplifier
with an input impedance of 30 MΩ. The high gain and low
TCVOS of the OP297 ensure accurate operation with microvolt
input signals. In this circuit, the input always appears as a
common-mode signal to the op amps. The CMR of the OP297
exceeds 120 dB, yielding an error of less than 2 ppm.
In Figure 33, the CH must be of polystyrene, Teflon®, or
polyethylene to minimize dielectric absorption and leakage.
The droop rate is determined by the size of CH and the bias
current of the OP297.
1kΩ
+15V
1N4148
C2
0.1µF
2
R3
1kΩ
R1
1kΩ
3
VIN
–
8
1/2
OP297
+
4
D1
1N4148
1
5
6
D2
1N4148
C3
0.1µF
–
1/2
OP297
6
1
+
1kΩ
5
–
1/2
OP297
+
1/2
OP297
+
RESET
1kΩ
7
7
VOUT
0.1µF
CH
–
2N930
–15V
0V < VOUT < 10V
Figure 33. Precision Positive Peak Detector
R2
2kΩ
SIMPLE BRIDGE CONDITIONING AMPLIFIER
00300-031
2
C1
30pF
VIN
1kΩ 3
0.1µF
00300-033
+15V
–15V
Figure 34 shows a simple bridge conditioning amplifier using
the OP297. The transfer function is
Figure 31. Precision Absolute Value Amplifier
ΔR ⎞ RF
VOUT = VREF ⎛⎜
⎟
⎝ R + ΔR ⎠ R
PRECISION CURRENT PUMP
Maximum output current of the precision current pump shown
in Figure 32 is ±10 mA. Voltage compliance is ±10 V with
±15 V supplies. Output impedance of the current transmitter
exceeds 3 MΩ with linearity better than 16 bits. R1 through R4
should be matched resistors.
The REF43 provides an accurate and stable reference voltage for
the bridge. To maintain the highest circuit accuracy, RF should
be 0.1% or better with a low temperature coefficient.
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R3
10kΩ
1/2
OP297
+
R4
10kΩ
1
R + ΔR
IOUT
10mA MAX
3
–
1/2
OP297
1
VOUT
+
+15V
8
7
1/2
OP297
5
IOUT =
VIN
R5
=
VIN
100Ω
= 10mA/V
6
5
6
–15V
–
8
1/2
OP297
+
7
VOUT = VREF
RF
ΔR
R + ΔR R
4
Figure 34. Simple Bridge Condition Amplifier Using the OP297
Figure 32. Precision Current Pump
Rev. G | Page 11 of 16
00300-034
3
–
4
R5
100kΩ
00300-032
R2
10kΩ
2
2
–
VIN
RF
VREF
REF43
+
R1
10kΩ
15V
OP297
R2
33kΩ
NONLINEAR CIRCUITS
Due to its low input bias currents, the OP297 is an ideal log
amplifier in nonlinear circuits such as the square and square
root circuits shown in Figure 35 and Figure 36. Using the
squaring circuit of Figure 35 as an example, the analysis begins
by writing a voltage loop equation across Transistor Q1,
Transistor Q2, Transistor Q3, and Transistor Q4.
⎛I
⎞
⎟ + VT2 ln⎜ IN
⎜I
⎟
⎝ S2
⎠
⎛I
⎞
⎟ = VT3 ln⎜ OUT
⎜ I
⎟
⎝ S3
⎠
⎛I
⎞
⎟ + VT4 ln⎜ REF
⎜ I
⎟
⎝ S4
⎠
6
IOUT
⎞
⎟
⎟
⎠
Q1
VIN
2lnIIN = lnIOUT + lnIREF = ln(IOUT × IREF)
(I IN )2
⎛ R2
VOUT = ⎜⎜
⎝ I REF
⎞⎛ VIN ⎞ 2
⎟⎜
⎟⎝ R1 ⎟⎠
⎠
(VIN )(I REF )
Q3
10
9
R3
50kΩ
4
R4
50kΩ
–15V
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Unadjusted accuracy of the square root circuit is better than
0.1% over an input voltage range of 100 mV to 10 V. For a
similar input voltage range, the accuracy of the squaring circuit
is better than 0.5%.
R1
R2
33kΩ
6
IOUT
+
Q3
10
8
4
V–
VOUT
+
MAT04E
8
C1
100pF V+
1/2
OP297
7
7
Q2
6
5
–
5
–
1/2
OP297
1
IREF
9
14
13
Q4
12
R3
50kΩ
R4
50kΩ
–15V
00300-035
1
2
Q1
3
3
1
8
An important consideration for the squaring circuit is that a
sufficiently large input voltage can force the output beyond the
operating range of the output op amp. Resistor R4 can be
changed to scale IREF or R1; R2 can be varied to keep the output
voltage within the usable range.
C2
100pF
VIN
8
1/2
OP297
+
7
14
Q4
12
In these circuits, IREF is a function of the negative power supply.
To maintain accuracy, the negative supply should be well regulated. For applications where very high accuracy is required, a
voltage reference can be used to set IREF.
A similar analysis made for the square root circuit of Figure 36
leads to its transfer function
2
–
13
V–
Op Amp A2 forms a current-to-voltage converter, which gives
VOUT = R2 × IOUT. Substituting (VIN/R1) for IIN and the previous
equation for IOUT yields
R1
33kΩ
2
+
MAT04E
1
Q2
5
VOUT
Figure 36. Square Root Amplifier
I REF
VOUT = R2
R1
33kΩ
3
Exponentiating both sides of the equation leads to
I OUT =
6
V+
7
IREF
3
C1
100pF
All the transistors of the MAT04 are precisely matched and at
the same temperature, so the IS and VT terms cancel, where
5
–
1/2
OP297
Figure 35. Squaring Amplifier
Rev. G | Page 12 of 16
00300-036
⎛I
VT1 ln⎜⎜ IN
⎝ I S1
C2
100pF
OP297
OUTLINE DIMENSIONS
0.400 (10.16)
0.365 (9.27)
0.355 (9.02)
8
5
1
0.280 (7.11)
0.250 (6.35)
0.240 (6.10)
4
0.100 (2.54)
BSC
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.060 (1.52)
MAX
0.210 (5.33)
MAX
0.015
(0.38)
MIN
0.150 (3.81)
0.130 (3.30)
0.115 (2.92)
SEATING
PLANE
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
0.195 (4.95)
0.130 (3.30)
0.115 (2.92)
0.015 (0.38)
GAUGE
PLANE
0.430 (10.92)
MAX
0.005 (0.13)
MIN
0.014 (0.36)
0.010 (0.25)
0.008 (0.20)
COMPLIANT TO JEDEC STANDARDS MS-001
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.
Figure 37. 8-Lead Plastic Dual In-Line Package [PDIP]
P-Suffix (N-8)
Dimensions shown in inches and (millimeters)
070606-A
0.070 (1.78)
0.060 (1.52)
0.045 (1.14)
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0.005 (0.13)
MIN
8
0.055 (1.40)
MAX
5
0.310 (7.87)
0.220 (5.59)
1
4
0.100 (2.54) BSC
0.320 (8.13)
0.290 (7.37)
0.405 (10.29) MAX
0.060 (1.52)
0.015 (0.38)
0.200 (5.08)
MAX
0.150 (3.81)
MIN
0.200 (5.08)
0.125 (3.18)
0.023 (0.58)
0.014 (0.36)
0.070 (1.78)
0.030 (0.76)
SEATING
PLANE
15°
0°
0.015 (0.38)
0.008 (0.20)
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 38. 8-Lead Ceramic Dual In-Line Package [CERDIP]
Z-Suffix (Q-8)
Dimensions shown in inches and (millimeters)
Rev. G | Page 13 of 16
OP297
5.00 (0.1968)
4.80 (0.1890)
8
1
5
4
1.27 (0.0500)
BSC
0.25 (0.0098)
0.10 (0.0040)
COPLANARITY
0.10
SEATING
PLANE
6.20 (0.2441)
5.80 (0.2284)
1.75 (0.0688)
1.35 (0.0532)
0.51 (0.0201)
0.31 (0.0122)
0.50 (0.0196)
0.25 (0.0099)
45°
8°
0°
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
COMPLIANT TO JEDEC STANDARDS MS-012-A A
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
012407-A
4.00 (0.1574)
3.80 (0.1497)
Figure 39. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
S-Suffix (R-8)
Dimensions shown in millimeters and (inches)
ORDERING GUIDE
Model
OP297EZ
OP297FP
OP297FPZ 1
OP297FS
OP297FS-REEL
OP297FS-REEL7
OP297FSZ1
OP297FSZ-REEL1
OP297FSZ-REEL71
OP297GP
OP297GPZ1
OP297GS
OP297GS-REEL
OP297GS-REEL7
OP297GSZ1
OP297GSZ-REEL1
OP297GSZ-REEL71
1
Temperature Range
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
Package Description
8-Lead CERDIP
8-Lead PDIP
8-Lead PDIP
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead PDIP
8-Lead PDIP
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
Package Options
Q-8 (Z-Suffix)
N-8 (P-Suffix)
N-8 (P-Suffix)
R-8 (S-Suffix)
R-8 (S-Suffix)
R-8 (S-Suffix)
R-8 (S-Suffix)
R-8 (S-Suffix)
R-8 (S-Suffix)
N-8 (P-Suffix)
N-8 (P-Suffix)
R-8 (S-Suffix)
R-8 (S-Suffix)
R-8 (S-Suffix)
R-8 (S-Suffix)
R-8 (S-Suffix)
R-8 (S-Suffix)
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Z = RoHS Compliant Part.
Rev. G | Page 14 of 16
OP297
NOTES
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Rev. G | Page 15 of 16
OP297
NOTES
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©2008 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D00300-0-4/08(G)
Rev. G | Page 16 of 16
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