TLC4501, TLC4501A, TLC4502, TLC4502A FAMILY OF SELF-CALIBRATING (Self-Cal )

TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal)
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221B – MAY 1998 – REVISED APRIL 2001
D
D
D
D
D
D
D
D
D
D
D
D
Self-Calibrates Input Offset Voltage to
40 µV Max
Low Input Offset Voltage Drift . . . 1 µV/°C
Input Bias Current . . . 1 pA
Open Loop Gain . . . 120 dB
Rail-To-Rail Output Voltage Swing
Stable Driving 1000 pF Capacitive Loads
Gain Bandwidth Product . . . 4.7 MHz
Slew Rate . . . 2.5 V/µs
High Output Drive Capability . . . ±50 mA
Calibration Time . . . 300 ms
Characterized From – 55°C to 125°C
Available in Q-Temp Automotive
HighRel Automotive Applications
Configuration Control / Print Support
Qualification to Automotive Standards
description
The TLC4501 and TLC4502 are the highest precision CMOS single supply rail-to-rail operational amplifiers
available today. The input offset voltage is 10 µV typical and 40 µV maximum. This exceptional precision,
combined with a 4.7-MHz bandwidth, 2.5-V/µs slew rate, and 50-mA output drive, is ideal for multiple
applications including: data acquisition systems, measurement equipment, industrial control applications, and
portable digital scales.
These amplifiers feature self-calibrating circuitry which digitally trims the input offset voltage to less than 40 µV
within the first 300 ms of operation. The offset is then digitally stored in an integrated successive approximation
register (SAR). Immediately after the data is stored, the calibration circuitry effectively drops out of the signal
path, shuts down, and the device functions as a standard operational amplifier.
IN+
Offset Control
3
+
1
2
OUT
–
IN–
Calibration Circuitry
SAR
D/A
VDD
A/D
5V
8
4
Power-On
Reset
Control
Logic
GND
Oscillator
Figure 1. Channel One of the TLC4502
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
LinEPIC and Self-Cal are trademarks of Texas Instruments.
Copyright  2001, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
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• DALLAS, TEXAS 75265
1
TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal)
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221B – MAY 1998 – REVISED APRIL 2001
description (continued)
Using this technology eliminates the need for noisy and expensive chopper techniques, laser trimming, and
power hungry, split supply bipolar operational amplifiers.
TLC4501
D PACKAGE
(TOP VIEW)
NC
1IN –
1IN +
VDD – /GND
1
8
2
7
3
6
4
5
TLC4502
D OR JG PACKAGE
(TOP VIEW)
NC
VDD+
OUT
NC
1OUT
1IN –
1IN +
VDD – /GND
1
8
2
7
3
6
4
5
TLC4502
U PACKAGE
(TOP VIEW)
VDD+
2OUT
2IN –
2IN+
NC
1OUT
1IN –
1IN +
VDD – /GND
1
10
2
9
3
8
4
7
5
6
NC
VDD +
2OUT
2IN –
2IN +
NC
1OUT
NC
VDD+
NC
TLC4502
FK PACKAGE
(TOP VIEW)
4
3 2 1 20 19
18
5
17
6
16
7
15
8
14
9 10 11 12 13
NC
2OUT
NC
2IN –
NC
NC
VDD– /GND
NC
2IN+
NC
NC
1IN –
NC
1IN +
NC
NC – No internal connection
AVAILABLE OPTIONS
PACKAGED DEVICES
TA
0°C to 70°C
– 40°C to 125°C
– 40°C to 125°C
– 55°C to 125°C
VIOmax AT 25°C
SMALL
OUTLINE†
(D)
CERAMIC DIP
(JG)
CERAMIC FLAT
PACK
(U)
40 µV
TLC4501ACD
—
—
—
50 µV
TLC4502ACD
—
—
—
80 µV
TLC4501CD
—
—
—
100 µV
TLC4502CD
—
—
—
40 µV
TLC4501AID
—
—
—
50 µV
TLC4502AID
—
—
—
80 µV
TLC4501ID
—
—
—
100 µV
TLC4502ID
—
—
—
TLC4502AQD
—
—
—
50 µV
100 µV
50 µV
TLC4502QD
TLC4502AMD
100 µV
TLC4502MD
† The D package is also available taped and reeled.
2
CHIP CARRIER
(FK)
—
—
—
TLC4502AMFKB
TLC4502AMJGB
TLC4502AMUB
TLC4502MFKB
TLC4502MJGB
TLC4502MUB
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POST OFFICE BOX 655303
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TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal)
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221B – MAY 1998 – REVISED APRIL 2001
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VDD + (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Differential input voltage, VID (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 7 V
Input voltage range, VI (any input, see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.3 V to 7 V
Input current, II (each input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 5 mA
Output current, IO (each output) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 100 mA
Total current into VDD + . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 100 mA
Total current out of VDD – /GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 100 mA
Electrostatic discharge (ESD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . > 2 kV
Duration of short-circuit current at (or below) 25°C (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . unlimited
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Operating free-air temperature range, TA: TLC4502C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
TLC4502I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 40°C to 125°C
TLC4502Q . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 40°C to 125°C
TLC4502M . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 55°C to 125°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
Case temperature for 60 seconds, TC: FK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential voltages, are with respect to VDD – /GND .
2. Differential voltages are at IN+ with respect to IN –. Excessive current flows when an input is brought below VDD – – 0.3 V.
3. The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum
dissipation rating is not exceeded.
DISSIPATION RATING TABLE
PACKAGE
TA ≤ 25°C
POWER RATING
DERATING FACTOR
ABOVE TA = 25°C
TA = 70°C
POWER RATING
TA = 85°C
POWER RATING
TA = 125°C
POWER RATING
D
FK
JG
U
725 mW
1375 mW
W
1050 mW
675 mW
5.8 mW/°C
11.0
11
0 mW/°C
W/°C
8 4 mW/°C
8.4
mW/ C
5.4 mW/°C
464 mW
880 mW
W
672 mW
432 mW
377 mW
715 mW
W
546 mW
350 mW
145 mW
275 mW
W
210 mW
135 mW
recommended operating conditions
TLC4502C
MIN
Supply voltage, VDD
4
Input voltage range, VI
Common-mode input voltage, VIC
Operating free-air temperature, TA
VDD –
VDD –
0
MAX
6
TLC4502I
MIN
4
MAX
6
TLC4502Q
MIN
4
MAX
TLC4502M
MIN
6
4
MAX
6
UNIT
V
VDD+ – 2.3
VDD+ – 2.3
VDD –
VDD –
VDD+ – 2.3
VDD+ – 2.3
VDD –
VDD –
VDD+ – 2.3
VDD+ – 2.3
VDD –
VDD –
VDD+ – 2.3
VDD+ – 2.3
V
70
– 40
125
– 40
125
– 55
125
°C
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• DALLAS, TEXAS 75265
V
3
TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal)
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221B – MAY 1998 – REVISED APRIL 2001
electrical characteristics at specified free-air temperature, VDD = 5 V, GND = 0 (unless otherwise
noted)
PARAMETER
VIO
Input offset voltage
αVIO
Temperature coefficient of input
offset voltage
IIO
Input offset current
IIB
Input bias current
VOH
High-level output voltage
TEST CONDITIONS
VDD = ± 2.5 V,,
VIC = 0,
VO = 0,,
RS = 50 Ω
TA†
TYP
MAX
TLC4501
–80
10
80
TLC4501A
–40
10
40
–100
10
100
–50
10
50
TLC4502
Full range
TLC4502A
VDD = ± 2.5 V,
VIC = 0,
VO = 0,
RS = 50 Ω
1
Full range
IOL = 500 µA
IOL = 5 mA
VIC = 2.5 V,,
RL = 1 kΩ,
VO = 1 V to 4 V,,
See Note 4
Differential input resistance
RL
Input resistance
See Note 4
CL
Common-mode input capacitance
f = 10 kHz,
zO
Closed-loop output impedance
AV = 10,
60
60
500
µV
pA
pA
4.99
V
4.9
4.7
25°C
0.01
25°C
0.1
Full range
V
0.3
25°C
200
Full range
200
1000
V/mV
25°C
10
kΩ
25°C
1012
Ω
P package
25°C
8
pF
f = 100 kHz
25°C
1
Ω
CMRR
Common mode rejection ratio
Common-mode
VIC = 0 to 2.7 V,, VO = 2.5 V,,
RS = 1 kΩ
kSVR
Supply-voltage
y
g rejection
j
ratio
(∆VDD ± /∆VIO)
VDD = 4 V to 6 V
V, VIC = 0,
0 No load
TLC4501/A
5 V,
V
VO = 2
2.5
UNIT
µV/°C
500
25°C
VIC = 2.5
2 5 V,
V
RI(D)
No load
TLC4502/A
VIT(CAL) Calibration input threshold voltage
† Full range is 0°C to 70°C.
NOTE 4: RL and CL values are referenced to 2.5 V.
4
1
25°C
IOH = – 5 mA
Large-signal
differential voltage
g
g
g
amplification
Supply current
25°C
25°C
AVD
IDD
1
Full range
VIC = 2.5 V,
Low-level output voltage
Full range
Full range
IOH = – 500 µA
VOL
TLC450xC
MIN
25°C
90
Full range
85
25°C
90
Full range
90
25°C
1
• DALLAS, TEXAS 75265
dB
1.5
2
25°C
2.5
Full range
Full range
dB
100
Full range
3.5
mA
4
4
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100
V
TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal)
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221B – MAY 1998 – REVISED APRIL 2001
operating characteristics, VDD = 5 V
PARAMETER
SR
Slew rate at unity gain
Vn
Equivalent input noise voltage
VN(PP)
Peak-to-peak equivalent
input noise
q
voltage
In
Equivalent input noise current
THD + N
BOM
ts
φm
TEST CONDITIONS
VO = 0.5
0 5 V to 2.5
2 5 V,
V
CL = 100 pF
TA†
25°C
Full range
TLC450xC, TLC450xAC
MIN
TYP
1.5
2.5
1
MAX
UNIT
V/µs
V/µs
f = 10 Hz
25°C
70
f = 1 kHz
25°C
12
f = 0.1 to 1 Hz
25°C
1
f = 0.1 to 10 Hz
25°C
1.5
25°C
0.6
nV/√H
nV/√Hz
µV
fA/√Hz
VO = 0.5 V to 2.5 V,
f = 10 kH
kHz,
RL = 1 kΩ,
CL = 100 pF
AV = 1
25°C
0.02%
AV = 10
25°C
0.08%
AV = 100
25°C
0.55%
Gain-bandwidth product
f = 10 kHz,
CL = 100 pF
RL = 1 kΩ,
25°C
4.7
MHz
Maximum output swing bandwidth
VO(PP) = 2 V,
RL = 1 kΩ,
AV = 1,
CL = 100 pF
25°C
1
MHz
to 0.1%
25°C
1.6
Settling time
AV = –1,
Step = 0.5 V to 2.5 V,
RL = 1 kΩ,
CL = 100 pF
to 0.01%
25°C
2.2
CL = 100 pF
25°C
74
25°C
300
Total harmonic distortion plus noise
Phase margin at unity gain
RL = 1 kΩ,
µs
Calibration time
ms
† Full range is 0°C to 70°C.
NOTE 4: RL and CL values are referenced to 2.5 V.
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POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
5
TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal)
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221B – MAY 1998 – REVISED APRIL 2001
electrical characteristics at specified free-air temperature, VDD = 5 V, GND = 0 (unless otherwise
noted)
PARAMETER
VIO
Input offset voltage
αVIO
Temperature coefficient of input
offset voltage
TEST CONDITIONS
VDD = ± 2.5 V,,
VIC = 0,
VO = 0,,
RS = 50 Ω
TA†
TYP
MAX
TLC4501
–80
10
80
TLC4501A
–40
10
40
–100
10
100
–50
10
50
TLC4502
Full range
TLC4502A
IIO
Input offset current
VDD = ± 2.5 V,
VIC = 0,
TLC450xI
MIN
VO = 0,
RS = 50 Ω
Full range
1
25°C
1
– 40°C to
85°C
IIB
Input bias current
VDD = ± 2.5 V,
VIC = 0,
VO = 0,
RS = 50 Ω
IOH = – 500 µA
VOH
High-level output voltage
VIC = 2.5 V,
VOL
Low-level output voltage
IOL = 500 µA
IOL = 5 mA
VIC = 2.5 V,,
RL = 1 kΩ,
VO = 1 V to 4 V,,
See Note 4
Large-signal
g
g
differential voltage
g
amplification
RI(D)
Differential input resistance
RL
Input resistance
See Note 4
CL
Common-mode input capacitance
f = 10 kHz,
zO
Closed-loop output impedance
AV = 10,
nA
4.99
V
4.9
4.7
25°C
0.01
25°C
0.1
V
0.3
25°C
200
Full range
200
1000
V/mV
10
kΩ
1012
Ω
P package
25°C
8
pF
f = 100 kHz
25°C
1
Ω
kSVR
Supply-voltage
y
g rejection
j
ratio
(∆VDD ± /∆VIO)
VDD = 4 V to 6 V
V, VIC = 0,
0 No load
TLC4501/A
No load
TLC4502/A
VIT(CAL) Calibration input threshold voltage
† Full range is – 40°C to 125°C.
NOTE 4: RL and CL values are referenced to 2.5 V.
6
10
pA
25°C
VIC = 0 to 2.7 V,, VO = 2.5 V,,
RS = 1 kΩ
5 V,
V
VO = 2
2.5
nA
25°C
Common mode rejection ratio
Common-mode
Supply current
Full range
Full range
CMRR
IDD
500
Full range
pA
60
– 40°C to
85°C
25°C
VIC = 2.5
2 5 V,
V
AVD
1
25°C
IOH = – 5 mA
60
5
25°C
µV
µV/°C
500
Full range
UNIT
25°C
90
Full range
85
25°C
90
Full range
90
25°C
1
• DALLAS, TEXAS 75265
dB
1.5
2
25°C
2.5
Full range
Full range
dB
100
Full range
3.5
mA
4
4
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POST OFFICE BOX 655303
100
V
TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal)
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221B – MAY 1998 – REVISED APRIL 2001
operating characteristics, VDD = 5 V
PARAMETER
SR
Slew rate at unity gain
Vn
Equivalent input noise voltage
VN(PP)
Peak-to-peak equivalent
input noise
q
voltage
In
Equivalent input noise current
THD + N
BOM
ts
φm
TEST CONDITIONS
VO = 0.5
0 5 V to 2.5
2 5 V,
V
CL = 100 pF
TA†
25°C
Full range
TLC450xI, TLC450xAI
MIN
TYP
1.5
2.5
1
MAX
UNIT
V/µs
V/µs
f = 10 Hz
25°C
70
f = 1 kHz
25°C
12
f = 0.1 to 1 Hz
25°C
1
f = 0.1 to 10 Hz
25°C
1.5
25°C
0.6
nV/√H
nV/√Hz
µV
fA/√Hz
VO = 0.5 V to 2.5 V,
f = 10 kH
kHz,
RL = 1 kΩ,
CL = 100 pF
AV = 1
25°C
0.02%
AV = 10
25°C
0.08%
AV = 100
25°C
0.55%
Gain-bandwidth product
f = 10 kHz,
CL = 100 pF
RL = 1 kΩ,
25°C
4.7
MHz
Maximum output swing bandwidth
VO(PP) = 2 V,
RL = 1 kΩ,
AV = 1,
CL = 100 pF
25°C
1
MHz
to 0.1%
25°C
1.6
Settling time
AV = –1,
Step = 0.5 V to 2.5 V,
RL = 1 kΩ,
CL = 100 pF
to 0.01%
25°C
2.2
CL = 100 pF
25°C
74
25°C
300
Total harmonic distortion plus noise
Phase margin at unity gain
RL = 1 kΩ,
µs
Calibration time
ms
† Full range is – 40°C to 125°C.
NOTE 4: RL and CL values are referenced to 2.5 V.
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POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
7
TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal)
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221B – MAY 1998 – REVISED APRIL 2001
electrical characteristics at specified free-air temperature, VDD = 5 V, GND = 0 (unless otherwise
noted)
PARAMETER
VIO
Input offset voltage
αVIO
Temperature coefficient of input
offset voltage
IIO
Input offset current
IIB
Input bias current
VOH
High-level output voltage
TEST CONDITIONS
VDD = ± 2.5 V,,
VIC = 0,
VDD = ± 2.5 V,
VIC = 0,
VO = 0,,
RS = 50 Ω
TLC4502
TLC4502A
VO = 0,
RS = 50 Ω
MAX
–100
10
100
–50
10
50
Full range
1
25°C
1
1
Full range
IOL = 500 µA
IOL = 5 mA
VIC = 2.5 V,,
RL = 1 kΩ,
VO = 1 V to 4 V,,
See Note 4
Large-signal
differential voltage
g
g
g
amplification
RI(D)
Differential input resistance
RL
Input resistance
See Note 4
CL
Common-mode input capacitance
f = 10 kHz,
zO
Closed-loop output impedance
AV = 10,
µV
µV/°C
60
5
125°C
60
10
nA
nA
4.99
25°C
VIC = 2.5
2 5 V,
V
AVD
V
4.9
4.7
25°C
0.01
25°C
0.1
Full range
V
0.3
25°C
200
Full range
200
1000
V/mV
25°C
10
kΩ
25°C
1012
Ω
P package
25°C
8
pF
f = 100 kHz
25°C
1
Ω
CMRR
Common mode rejection ratio
Common-mode
VIC = 0 to 2.7 V,,
RS = 1 kΩ
kSVR
Supply-voltage
y
g rejection
j
ratio
(∆VDD ± /∆VIO)
VDD = 4 V to 6 V,, VIC = VDD /2,,
No load
IDD
Supply current
VO = 2
2.5
5 V,
V
VO = 2.5 V,,
No load
VIT(CAL) Calibration input threshold voltage
† Full range is – 40°C to 125°C for Q suffix, – 55°C to 125°C for M suffix.
NOTE 4: RL and CL values are referenced to 2.5 V.
8
TYP
25°C
IOH = – 5 mA
UNIT
MIN
25°C
VIC = 2.5 V,
Low-level output voltage
Full range
TLC4502Q,
TLC4502M
125°C
IOH = – 500 µA
VOL
TA†
25°C
90
Full range
85
25°C
90
Full range
90
25°C
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3.5
4
4
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100
2.5
Full range
Full range
100
mA
V
TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal)
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221B – MAY 1998 – REVISED APRIL 2001
operating characteristics, VDD = 5 V
PARAMETER
SR
Slew rate at unity gain
Vn
Equivalent input noise voltage
VN(PP)
Peak-to-peak equivalent
q
input noise
voltage
In
Equivalent input noise current
THD + N
BOM
ts
φm
TEST CONDITIONS
VO = 0.5 V to 2.5 V,,
See Note 4
CL = 100 pF
TA†
25°C
Full range
TLC4502Q, TLC4502M,
TLC4502AQ,
TLC4502AM
MIN
TYP
1.5
2.5
1
UNIT
MAX
V/µs
V/µs
f = 10 Hz
25°C
70
f = 1 kHz
25°C
12
f = 0.1 to 1 Hz
25°C
1
f = 0.1 to 10 Hz
25°C
1.5
25°C
0.6
nV/√H
nV/√Hz
µV
fA/√Hz
AV = 1
25°C
0.02%
Total harmonic distortion plus noise
VO = 0.5 V to 2.5 V,
f = 10 kH
kHz,
RL = 1 kΩ,
CL = 100 pF
AV = 10
25°C
0.08%
AV = 100
25°C
0.55%
Gain-bandwidth product
f = 10 kHz,
CL = 100 pF
RL = 1 kΩ,
25°C
4.7
MHz
Maximum output swing bandwidth
VO(PP) = 2 V,
RL = 1 kΩ,
AV = 1,
CL = 100 pF
25°C
1
MHz
to 0.1%
25°C
1.6
Settling time
AV = –1,
Step = 0.5 V to 2.5 V,
RL = 1 kΩ,
CL = 100 pF
to 0.01%
25°C
2.2
CL = 100 pF
25°C
74
25°C
300
Phase margin at unity gain
RL = 1 kΩ,
µs
Calibration time
† Full range is – 40°C to 125°C for Q suffix, – 55°C to 125°C for M suffix.
NOTE 4: RL and CL values are referenced to 2.5 V.
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9
TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal)
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221B – MAY 1998 – REVISED APRIL 2001
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
2, 3, 4
VIO
Input offset voltage
αVIO
Input offset voltage temperature coefficient
Distribution
VOH
VOL
High-level output voltage
vs High-level output current
8
Low-level output voltage
vs Low-level output current
9
VO(PP)
IOS
Maximum peak-to-peak output voltage
vs Frequency
10
Short-circuit output current
vs Free-air temperature
11
VO
Output voltage
vs Differential input voltage
12
AVD
Large signal differential voltage amplification
Large-signal
vs Free-air temperature
vs Frequency
13
14
zo
Output impedance
vs Frequency
15
CMRR
Common mode rejection ratio
Common-mode
vs Frequency
q
y
vs Free-air temperature
16
17
SR
Slew rate
vs Load capacitance
vs Free-air temperature
18
19
Vn
THD + N
φm
PSRR
10
Distribution
vs Common-mode input voltage
5
6, 7
Inverting large-signal pulse response
20
Voltage-follower large-signal pulse response
21
Inverting small-signal pulse response
22
Voltage-follower small-signal pulse response
23
Equivalent input noise voltage
vs Frequency
24
Input noise voltage
Over a 10-second period
25
Total harmonic distortion plus noise
vs Frequency
26
Gain-bandwidth product
vs Free-air temperature
27
vs Load capacitance
28
Phase margin
vs Frequency
14
Gain margin
vs Load capacitance
29
Power-supply rejection ratio
vs Free-air temperature
30
Calibration time at – 40°C
31
Calibration time at 25°C
32
Calibration time at 85°C
33
Calibration time at 125°C
34
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TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal)
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221B – MAY 1998 – REVISED APRIL 2001
TYPICAL CHARACTERISTICS
DISTRIBUTION OF TLC4502 INPUT
OFFSET VOLTAGE
486 Amplifier From 8 Wafer Lot
VDD = ± 2.5 V
TA = 25°C
12
14
Percentage of Amplifiers – %
12
10
8
6
4
10
8
6
4
2
2
VIO – Input Offset Voltage – µV
10
8
6
4
60
50
40
50
0
–50
–100
50
40
30
–200
20
0
10
–150
0
30
100
2
–10
VDD = ± 2.5 V
RS = 50 Ω
TA = 25°C
150
12
–20
20
200
296 Amplifier From 2 Wafer Lot
VDD = ± 2.5 V
14 T = 85°C
A
–30
0
INPUT OFFSET VOLTAGE
vs
COMMON-MODE INPUT VOLTAGE
16
–40
10
Figure 3
DISTRIBUTION OF TLC4502 INPUT
OFFSET VOLTAGE
–50
–10
VIO – Input Offset Voltage – µV
Figure 2
Percentage Of Amplification – %
–20
–60
VIO – Input Offset Voltage – µV
–30
0
40
30
20
10
0
–10
–20
–30
–40
0
–40
Percentage Of Amplification – %
16
14
339 Amplifier From 2 Wafer Lot
VDD = ± 2.5 V
TA = 40°C
–50
18
DISTRIBUTION OF TLC4502 INPUT
OFFSET VOLTAGE
VIO – Input Offset Voltage – µV
–3
–2
–1
0
1
2
3
VIC – Common-Mode Input Voltage – v
Figure 4
Figure 5
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TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal)
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221B – MAY 1998 – REVISED APRIL 2001
TYPICAL CHARACTERISTICS
DISTRIBUTION OF TLC4502 INPUT OFFSET
VOLTAGE TEMPERATURE COEFFICIENT
20
30 Amplifiers From 1 Wafer Lot
VDD = ± 2.5 V
TA = 25°C To –40°C
30 Amplifiers From
1 Wafer Lot
VDD = ± 2.5 V
TA = 25°C To 85°C
18
20
Percentage Of Amplifiers – %
Percentage Of Amplifiers – %
25
DISTRIBUTION OF TLC4502 INPUT OFFSET
VOLTAGE TEMPERATURE COEFFICIENT
15
10
5
16
14
12
10
8
6
4
2
0
3
3.5
2.5
2
1
1.5
0.5
Figure 7
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
2
5
VDD = 5 V
VIC = 2.5 V
VOL – Low-Level Output Voltage – V
TA = – 40°C
4.5
V
VOH
OH – High-Level Output Voltage – V
0
αVIO – Temperature Coefficient – µV/°C
Figure 6
4
TA = 125°C
3.5
TA = 25°C
3
TA = 85°C
2.5
2
ÁÁ
ÁÁ
–1
–0.5
–2
–1.5
–3
3
–3.5
–1
2
0
1
αVIO – Temperature Coefficient – µV/°C
–2
–2.5
0
–3
1.5
1
VDD = 5 V
VIC = 2.5 V
1.75
TA = 125°C
1.5
TA = 85°C
1.25
TA = 25°C
1
0.75
TA = – 40°C
0.5
0.25
0.5
0
0
0
50
60
70
10
20
30
40
IOH – High-Level Output Current – mA
80
0
60
70
10
20
30
40
50
IOL – Low-Level Output Current – mA
Figure 9
Figure 8
12
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TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal)
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221B – MAY 1998 – REVISED APRIL 2001
TYPICAL CHARACTERISTICS
SHORT-CIRCUIT OUTPUT CURRENT
vs
FREE-AIR TEMPERATURE
10
69
VDD = 5 V
I OS – Short-Circuit Output Current – mA
VO(PP) – Maximum Peak-To-Peak Output Voltage – V
MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE
vs
FREQUENCY
8
6
4
2
0
100
1k
10 k
100 k
1M
67
65
IOS–
63
61
59
57
55
–50
10 M
IOS+
f – Frequency – Hz
–25
0
25
50
75
TA – Free-Air Temperature – °C
Figure 10
Figure 11
LARGE-SIGNAL DIFFERENTIAL
VOLTAGE AMPLIFICATION
vs
FREE-AIR TEMPERATURE
OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE
3
RL = 1 kΩ
1
0
–1
–2
Voltage Amplification – V/mV
1400
AVD – Large-Signal Differential
VO – Output Voltage – V
1600
VDD = 5 V
VIC = 2.5 V
RL = 1 kΩ
TA = 25°C
2
100
1200
1000
800
600
400
200
–3
–0.2 –0.15 –0.1 –0.05 0
0.05 0.1 0.15
VID – Differential Input Voltage – mV
0.2
0
–55
–30
Figure 12
70
95
–5
20
45
TA – Free-Air Temperature – °C
120
Figure 13
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TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal)
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221B – MAY 1998 – REVISED APRIL 2001
TYPICAL CHARACTERISTICS
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
AMPLIFICATION AND PHASE MARGIN
vs
FREQUENCY
80
180°
Voltage Amplification – dB
AVD – Large-Signal Differential
60
135°
40
90°
20
45°
0
0°
–20
–40
1k
Phase Margin
VDD = 5 V
RL = 1 kΩ
CL = 100 pF
TA = 25°C
– 45°
10 k
100 k
1M
10 M
– 90°
100 M
f – Frequency – Hz
Figure 14
OUTPUT IMPEDANCE
vs
FREQUENCY
1000
z O – Output Impedance – Ω
100
10
1
AV = 100
0.1
AV = 10
0.01
AV = 1
0.001
100
1k
10 k
100 k
1M
f – Frequency – Hz
Figure 15
14
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TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal)
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221B – MAY 1998 – REVISED APRIL 2001
TYPICAL CHARACTERISTICS
COMMON-MODE REJECTION RATIO
vs
FREQUENCY
COMMON-MODE REJECTION RATIO
vs
FREE-AIR TEMPERATURE
130
VDD = 5 V
VIC = 2.5 V
TA = 25°C
100
90
CMRR – Common-Mode Rejection Ratio – dB
CMRR – Common-Mode Rejection Ratio – dB
110
80
70
60
50
40
30
20
10
100
1k
10 k
100 k
1M
VDD = 5 V
125
120
115
110
105
100
95
90
–50
10 M
–25
f – Frequency – Hz
75
100
0
25
50
TA – Free-Air Temperature – °C
Figure 16
Figure 17
SLEW RATE
vs
LOAD CAPACITANCE
SLEW RATE
vs
FREE-AIR TEMPERATURE
6
8
SR – Slew Rate – V/ µ s
5
SR – Slew Rate – V/ µ s
125
4
SR+
SR–
3
2
6
VDD = 5 V
RL = 1 kΩ
CL = 100 pF
AV = 1
SR–
4
SR+
2
1
0
10
100
1k
10 k
CL – Load Capacitance – pF
100 k
0
–50
–25
Figure 18
75
100
0
25
50
TA – Free-Air Temperature – °C
125
Figure 19
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TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal)
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221B – MAY 1998 – REVISED APRIL 2001
TYPICAL CHARACTERISTICS
VOLTAGE-FOLLOWER LARGE-SIGNAL
PULSE RESPONSE
4.5
4.5
4
4
3.5
3.5
VO – Output Voltage – V
VO – Output Voltage – V
INVERTING LARGE-SIGNAL PULSE RESPONSE
3
2.5
2
VDD = 5 V
RL = 1 kΩ
CL = 100 pF
AV = –1
TA = 25°C
1.5
1
3
2.5
2
VDD = 5 V
RL = 1 kΩ
CL = 100 pF
AV = 1
TA = 25°C
1.5
1
0.5
0.5
0
25
50
75
100 125
t – Time – µs
150
175
200
0
25
50
Figure 20
75 100 125
t – Time – µs
200
VOLTAGE-FOLLOWER SMALL-SIGNAL
PULSE RESPONSE
2.53
2.525
VDD = 5 V
RL = 1 kΩ
CL = 100 pF
AV = 1
TA = 25°C
2.52
2.52
VO – Output Voltage – V
2.515
VO – Output Voltage – V
175
Figure 21
INVERTING SMALL-SIGNAL PULSE RESPONSE
2.51
2.505
2.5
2.495
2.49
VDD = 5 V
RL = 1 kΩ
CL = 100 pF
AV = –1
TA 25°C
2.485
2.48
2.475
2.51
2.5
2.49
2.48
2.47
2.47
0
20
40
60
80 100 120 140 160 180 200
t – Time – µs
0
Figure 22
16
150
50
100
150
t – Time – µs
Figure 23
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250
TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal)
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221B – MAY 1998 – REVISED APRIL 2001
TYPICAL CHARACTERISTICS
EQUIVALENT INPUT NOISE VOLTAGE
vs
FREQUENCY
INPUT NOISE VOLTAGE OVER
A 10-SECOND PERIOD
1200
VDD = 5 V
RS = 20 Ω
TA = 25°C
90
VDD = 5 V
f = 0.1 Hz To 10 Hz
TA = 25°C
80
Input Noise Voltage – nV
V n – Equivalent Input Noise Voltage – nV/
VN
nv//HzHz
100
70
60
50
40
30
400
–400
20
10
–1200
0
10
100
1k
10 k
0
100 k
1
2
3
f – Frequency – Hz
5
6
7
8
9
10
Figure 25
Figure 24
GAIN-BANDWIDTH PRODUCT
vs
FREE-AIR TEMPERATURE
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
FREQUENCY
1
6
VDD = 5 V
RL = 1 kΩ TIED 2.5 V
Gain-Bandwidth Product – MHz
THD+N – Total Harmonic Distortion Plus Noise – %
4
t – Time – s
AV = 100
0.1
AV = 10
5.5
VDD = 5 V
F = 10 kHz
RL = 1 kΩ
CL = 100 pF
5
4.5
AV = 1
0.01
100
1k
10 k
100 k
f – Frequency – Hz
4
–40
–25
0
25
50
75
TA – Free-Air Temperature –°C
Figure 26
85
Figure 27
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TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal)
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221B – MAY 1998 – REVISED APRIL 2001
TYPICAL CHARACTERISTICS
PHASE MARGIN
vs
LOAD CAPACITANCE
GAIN MARGIN
vs
LOAD CAPACITANCE
90
30
TA 25°C
25
75
Rnull = 50 Ω
Gain Margin – dB
Phase Margin
60
Rnull = 20 Ω
45
30
50 kΩ
50 kΩ
15
VI
Rnull = 0
CL
0
100
1k
10 k
CL – Load Capacitance – pF
10
100 k
100
1k
10 k
CL – Load Capacitance – pF
10
Figure 28
CALIBRATION TIME AT – 40°C
0.5
VDD = 4 V To 6 V
VIC = VO = VDD/2
0
125
VO – Output Voltage – V
PSRR – Power Supply Rejection Ratio – dB
130
120
115
110
105
–0.5
–1
–1.5
–2
VDD = 2.5 V
GND = –2.5 V
RL = 1 kΩ to GND
AV = –1
VI = 0
–2.5
–3
–25
75
100
0
25
50
TA – Free-Air Temperature – °C
125
0
100 200 300 400 500 600 700 800 900 1000
t – Time – ms
Figure 30
18
100 k
Figure 29
POWER SUPPLY REJECTION RATIO
vs
FREE-AIR TEMPERATURE
100
–50
Rnull = 20 Ω
10
5
Rnull
VDD –
0
Rnull = 50 Ω
15
Rnull = 0
VDD +
–
+
20
Figure 31
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TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal)
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221B – MAY 1998 – REVISED APRIL 2001
TYPICAL CHARACTERISTICS
CALIBRATION TIME AT 85°C
0
0
VO – Output Voltage – V
0.5
–0.5
–1
–1.5
VDD = 2.5 V
GND = –2.5 V
RL = 1 kΩ to GND
AV = –1
VI = 0
–2
–2.5
–0.5
–1
–1.5
VDD = 2.5 V
GND = –2.5 V
RL = 1 kΩ to GND
AV = –1
VI = 0
–2
–2.5
–3
–3
0
100 200 300 400 500 600 700 800 900 1000
0
100 200 300 400 500 600 700 800 900 1000
t – Time – ms
t – Time – ms
Figure 32
Figure 33
CALIBRATION TIME AT 125°C
0.5
0
VO – Output Voltage – V
VO – Output Voltage – V
CALIBRATION TIME AT 25°C
0.5
–0.5
–1
–1.5
VDD = 2.5 V
GND = –2.5 V
RL = 1 kΩ to GND
AV = –1
VI = 0
–2
–2.5
–3
0
100 200 300 400 500 600 700 800 900 1000
t – Time – ms
Figure 34
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TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal)
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221B – MAY 1998 – REVISED APRIL 2001
APPLICATION INFORMATION
D
D
D
D
D
The TLC4502 is designed to operate with only a single 5-V power supply, have true differential inputs, and
remain in the linear mode with an input common-mode voltage of 0.
The TLC4502 has a standard dual-amplifier pinout, allowing for easy design upgrades.
Large differential input voltages can be easily accommodated and, as input differential-voltage protection
diodes are not needed, no large input currents result from large differential input voltage. Protection should
be provided to prevent the input voltages from going negative more than – 0.3 V at 25°C. An input clamp
diode with a resistor to the device input terminal can be used for this purpose.
For ac applications, where the load is capacitively coupled to the output of the amplifier, a resistor can be
used from the output of the amplifier to ground. This increases the class-A bias current and prevents
crossover distortion. Where the load is directly coupled, for example in dc applications, there is no crossover
distortion.
Capacitive loads, which are applied directly to the output of the amplifier, reduce the loop stability margin.
Values of 500 pF can be accommodated using the worst-case noninverting unity-gain connection. Resistive
isolation should be considered when larger load capacitance must be driven by the amplifier.
The following typical application circuits emphasize operation on only a single power supply. When
complementary power supplies are available, the TLC4502 can be used in all of the standard operational
amplifier circuits. In general, introducing a pseudo-ground (a bias voltage of VI/2 like that generated by the
TLE2426) allows operation above and below this value in a single-supply system. Many application circuits
shown take advantage of the wide common-mode input-voltage range of the TLC4502, which includes ground.
In most cases, input biasing is not required and input voltages that range to ground can easily be
accommodated.
description of calibration procedure
To achieve high dc gain, large bandwidth, high CMRR and PSRR, as well as good output drive capability, the
TLC4502 is built around a 3-stage topology: two gain stages, one rail-to-rail, and a class-AB output stage. A
nested Miller topology is used for frequency compensation.
During the calibration procedure, the operational amplifier is removed from the signal path and both inputs are
tied to GND. Figure 35 shows a block diagram of the amplifier during calibration mode.
20
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TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal)
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221B – MAY 1998 – REVISED APRIL 2001
VDD
POWER-ON RESET
S
Q
R
Q
ENABLE
COUNTER
RC
OSCILLATOR
RCO
–
CAL
CLOCK
RESET
DAC
SAR
CORE
AMPLIFIER
+
LPF
RCO
Figure 35. Block Diagram During Calibration Mode
The class AB output stage features rail-to-rail voltage swing and incorporates additional switches to put the
output node into a high-impedance mode during the calibration cycle. Small-replica output transistors (matched
to the main output transistors) provide the amplifier output signal for the calibration circuit. The TLC4502 also
features built-in output short-circuit protection. The output current flowing through the main output transistors
is continuously being sensed. If the current through either of these transistors exceeds the preset limit (60 mA
– 70 mA) for more than about 1 µs, the output transistors are shut down to approximately their quiescent
operating point for approximately 5 ms. The device is then returned to normal operation. If the short circuit is
still in place, it is detected in less than 1 µs and the device is shut down for another 5 ms.
The offset cancellation uses a current-mode digital-to-analog converter (DAC), whose full-scale current allows
for an adjustment of approximately ± 5 mV to the input offset voltage. The digital code producing the cancellation
current is stored in the successive-approximation register (SAR).
During power up, when the offset cancellation procedure is initiated, an on-chip RC oscillator is activated to
provide the timing of the successive-approximation algorithm. To prevent wide-band noise from interfering with
the calibration procedure, an analog low-pass filter followed by a Schmitt trigger is used in the decision chain
to implement an averaging process. Once the calibration procedure is complete, the RC oscillator is deactivated
to reduce supply current and the associated noise.
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POST OFFICE BOX 655303
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21
TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal)
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221B – MAY 1998 – REVISED APRIL 2001
APPLICATION INFORMATION
The key operational-amplifier parameters CMRR, PSRR, and offset drift were optimized to achieve superior
offset performance. The TLC4502 calibration DAC is implemented by a binary-weighted current array using a
pseudo-R-2R MOSFET ladder architecture, which minimizes the silicon area required for the calibration
circuitry, and thereby reduces the cost of the TLC4502.
Due to the performance (precision, PSRR, CMRR, gain, output drive, and ac performance) of the TLC4502, it
is ideal for applications like:
D
D
D
D
D
D
D
Data acquisition systems
Medical equipment
Portable digital scales
Strain gauges
Automotive sensors
Digital audio circuits
Industrial control applications
It is also ideal in circuits like:
D
D
D
D
D
A precision buffer for current-to-voltage converters, a/d buffers, or bridge applications
High-impedance buffers or preamplifiers
Long term integration
Sample-and-hold circuits
Peak detectors
The TLC4502 self-calibrating operational amplifier is manufactured using Texas instruments LinEPIC process
technology and is available in an 8-pin SOIC (D) Package. The C-suffix devices are characterized for operation
from 0°C to 70°C. The I-suffix devices are characterized for operation from –40°C to 125°C. The M-suffix
devices are characterized for operation from –55°C to 125°C.
22
www.BDTIC.com/TI
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal)
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221B – MAY 1998 – REVISED APRIL 2001
APPLICATION INFORMATION
R1
R2
R3
R4
R5
R6
90 kΩ
9 kΩ
1 kΩ
1 kΩ
9 kΩ
90 kΩ
V(REF)+
V(REF)–
Gain = 10
Gain = 100
Gain = 100
Gain = 10
VDD
0.1 pF
8
2
6
–
1/2
TLC4502
RP
3
VI2
–
1/2
TLC4502
1
5
+
+
7
VO+
VO–
4
1 kΩ
RP
VI1
1 kΩ
+ 10)
V
+ 100)
V
(Gain
(Gain
O
O
ǒ
+ǒ
+
Ǔǒ
Ǔǒ
Ǔ
Ǔ
* VI2 1 ) R4 R6
) R5 ) V(REF) Where R1 + R6, R2 + R5, and R3 + R4
V *V
1 ) R5 ) R6 ) V
I1
I2
(REF) Where R1 + R6, R2 + R5, and R3 + R4
R4
V
I1
Figure 36. Single-Supply Programmable Instrumentation Amplifier Circuit
RP1 < 1 kΩ
5
VI
RP2 < 1 kΩ
3
1/2
TLC4502
+
1/2
TLC4502
2
+
R3
1
6
–
VO
7
4
–
R4
R2
RG
V
R1
+ VI
O
ƪǒ Ǔ ǒ Ǔ ƫ
1
Where : R1
V(REF)
) R4
)
R3
2R4
R
G
) V(REF)
+ R4 and R2 + R3
Figure 37. Two Operational-Amplifier Instrumentation Amplifier Circuit
www.BDTIC.com/TI
POST OFFICE BOX 655303
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23
TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal)
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221B – MAY 1998 – REVISED APRIL 2001
APPLICATION INFORMATION
3
+
1/2
TLC4502
2
R3
R5
1
–
R1
VI
RG
2
–
1/2
TLC4502
R2
3
6
+
–
1/2
TLC4502
5
VO
1
R4
7
+
ǒ Ǔǒ
R6
V
V(REF)
O
+ VI R5
R3
Where : R1
2R1
R
G
Ǔ
) 1 ) V(REF)
+ R2,
R3
+ R4,
Figure 38. Three Operational-Amplifier Instrumentation Amplifier Circuit
VI
R1
2
R4
–
1/2
TLC4502
R2
3
R5
1
+
I1
I2
R3
Figure 39. Fixed Current-Source Circuit
24
www.BDTIC.com/TI
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
and R5
+ R6
TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal)
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221B – MAY 1998 – REVISED APRIL 2001
APPLICATION INFORMATION
2
–
1/2
TLC4502
3
VI
1
VO
+
V
I
+ VO
Figure 40. Voltage-Follower Circuit
VI
2
–
30 mA
1/2
TLC4502
3
1
β ≥ 20
600 mA
100 Ω
+
Figure 41. Lamp-Driver Circuit
2
–
1/2
TLC4502
3
1
+
RL
240 Ω
Figure 42. TTL-Driver Circuit
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POST OFFICE BOX 655303
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25
TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal)
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221B – MAY 1998 – REVISED APRIL 2001
APPLICATION INFORMATION
IO
+
3
VI
1/2
TLC4502
2
I
1
–
+ RVI
O
RE
E
Figure 43. High-Compliance Current-Sink Circuit
2
VI
–
1/2
TLC4502
R1
10 kΩ
3
V(REF)
1
VO
+
R2
10 MΩ
Figure 44. Comparator With Hysteresis Circuit
IB
6
2
–
3
1/2
TLC4502
IB
1/2
TLC4502
VI
–
5
1
7
VO
ZO
+
C1
1 µF
+
ZI
Figure 45. Low-Drift Detector Circuit
26
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POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal)
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221B – MAY 1998 – REVISED APRIL 2001
APPLICATION INFORMATION
macromodel information
Macromodel information provided was derived using Microsim Parts Release 8, the model generation
software used with Microsim PSpice . The Boyle macromodel (see Note 4) and subcircuit in Figure 46 are
generated using the TLC4501 typical electrical and operating characteristics at TA = 25°C. Using this
information, output simulations of the following key parameters can be generated to a tolerance of 20% (in most
cases):
D
D
D
D
D
D
D
D
D
D
D
D
Maximum positive output voltage swing
Maximum negative output voltage swing
Slew rate
Quiescent power dissipation
Input bias current
Open-loop voltage amplification
Unity-gain frequency
Common-mode rejection ratio
Phase margin
DC output resistance
AC output resistance
Short-circuit output current limit
NOTE 4: G. R. Boyle, B. M. Cohn, D. O. Pederson, and J. E. Solomon, “Macromodeling of Integrated Circuit Operational Amplifiers”, IEEE Journal
of Solid-State Circuits, SC-9, 353 (1974).
99
EGND +
R2
3
VDD +
–
+
ISS
RSS
CSS
VD
–
53
RP
10
2
IN –
J1
FB
6
7
+
9
VLIM
+
VB
8
GA
GCM
J2
–
–
DC
RO1
OUT
IN +
1
11
12
RD1
5
DLN
DE
92
54
C1
DP
+
RD2
VE
VDD –
RO2
C2
.subckt TLC4501 1 2 3 4 5
*
c1
11
12
1.4559E–12
c2
6
7
8.0000E–12
css
10
99
1.0000E–30
dc
5
53
dy
de
54
5
dy
dlp
90
91
dx
dln
92
90
dx
dp
4
3
dx
egnd
99
0
poly(2) (3,0) (4,0) 0 .5 .5
fb
7
99
poly(5) vb vc ve vlp vln 0
+ 84.657E9 –1E3 1E3 85E9 –85E9
ga
6
0
11 12 236.25E–6
gcm
0
6
10 99 2.3625E–9
iss
10
4
dc 20.000E–6
hlim
90
0
vlim 1K
j1
11
2
10 jx1
j2
12
1
10 jx2
–
–
–
+
90
HLIM
–
4
+ DLP
91
+
VLP
VLN
r2
6
9
100.00E3
rd1
3
11
4.2328E3
rd2
3
12
4.2328E3
ro1
8
5
5.0000E–3
ro2
7
99
5.0000E–3
rp
3
4
5.0000E3
rss
10
99
10.000E6
vb
9
0
dc 0
vc
3
53
dc .92918
ve
54
4
dc .82918
vlim
7
8
dc 0
vlp
91
0
dc 67
vln
0
92
dc 67
.model dx D(Is=800.00E–18)
.model dy D(Is=800.00E–18 Rs=1m Cjo=10p)
.model jx1 NJF(Is=500.00E–15 Beta=2.7907E–3 Vto=–1)
.model jx2 NJF(Is=500.00E–15 Beta=2.7907E–3 Vto=–1)
.ends
Figure 46. Boyle Macromodel and Subcircuit
PSpice and Parts are trademarks of MicroSim Corporation.
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POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
27
PACKAGE OPTION ADDENDUM
www.ti.com
26-Mar-2010
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
5962-9753701Q2A
ACTIVE
LCCC
FK
20
1
TBD
5962-9753701QHA
ACTIVE
CFP
U
10
1
TBD
5962-9753701QPA
ACTIVE
CDIP
JG
8
1
TBD
5962-9753702Q2A
ACTIVE
LCCC
FK
20
1
TBD
5962-9753702QHA
ACTIVE
CFP
U
10
1
TBD
5962-9753702QPA
ACTIVE
CDIP
JG
8
1
TLC4501ACD
ACTIVE
SOIC
D
8
75
TLC4501ACDG4
ACTIVE
SOIC
D
8
75
TLC4501AID
ACTIVE
SOIC
D
8
TLC4501AIDG4
ACTIVE
SOIC
D
8
TLC4501AIDR
ACTIVE
SOIC
D
TLC4501AIDRG4
ACTIVE
SOIC
TLC4501AQD
PREVIEW
TLC4501AQDR
TLC4501CD
Lead/Ball Finish
MSL Peak Temp (3)
POST-PLATE N / A for Pkg Type
A42
N / A for Pkg Type
A42
N / A for Pkg Type
POST-PLATE N / A for Pkg Type
A42
N / A for Pkg Type
TBD
A42
N / A for Pkg Type
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SOIC
D
8
PREVIEW
SOIC
D
8
ACTIVE
SOIC
D
8
75
TLC4501CDG4
ACTIVE
SOIC
D
8
75
TLC4501ID
ACTIVE
SOIC
D
8
TLC4501IDG4
ACTIVE
SOIC
D
8
TLC4501IDR
ACTIVE
SOIC
D
TLC4501IDRG4
ACTIVE
SOIC
TBD
Call TI
Call TI
TBD
Call TI
Call TI
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC4501QD
PREVIEW
SOIC
D
8
TBD
Call TI
Call TI
TLC4501QDR
PREVIEW
SOIC
D
8
TBD
Call TI
Call TI
TLC4502ACD
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC4502ACDG4
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC4502ACDR
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC4502ACDRG4
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC4502AID
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC4502AIDG4
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC4502AIDR
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
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Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
26-Mar-2010
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
TLC4502AIDRG4
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
Lead/Ball Finish
MSL Peak Temp (3)
CU NIPDAU
Level-1-260C-UNLIM
TLC4502AMD
ACTIVE
SOIC
D
8
75
TBD
CU NIPDAU
Level-1-220C-UNLIM
TLC4502AMDG4
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC4502AMFKB
ACTIVE
LCCC
FK
20
1
TBD
TLC4502AMJGB
ACTIVE
CDIP
JG
8
1
TBD
A42
N / A for Pkg Type
TLC4502AMUB
ACTIVE
CFP
U
10
1
TBD
A42
N / A for Pkg Type
TLC4502AQD
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC4502AQDG4
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC4502AQDR
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC4502AQDRG4
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC4502CD
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC4502CDG4
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC4502CDR
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC4502CDRG4
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC4502ID
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC4502IDG4
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC4502IDR
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC4502IDRG4
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC4502MD
ACTIVE
SOIC
D
8
75
TBD
CU NIPDAU
Level-1-220C-UNLIM
TLC4502MDG4
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC4502MFKB
ACTIVE
LCCC
FK
20
1
TBD
TLC4502MJG
ACTIVE
CDIP
JG
8
1
TBD
A42
N / A for Pkg Type
TLC4502MJGB
ACTIVE
CDIP
JG
8
1
TBD
A42
N / A for Pkg Type
TLC4502MUB
ACTIVE
CFP
U
10
1
TBD
A42
N / A for Pkg Type
TLC4502QD
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC4502QDG4
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC4502QDR
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC4502QDRG4
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
POST-PLATE N / A for Pkg Type
POST-PLATE N / A for Pkg Type
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
www.BDTIC.com/TI
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
26-Mar-2010
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
www.BDTIC.com/TI
Addendum-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com
27-Aug-2010
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
TLC4501AIDR
SOIC
D
8
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
TLC4501IDR
SOIC
D
8
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
TLC4502ACDR
SOIC
D
8
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
TLC4502AIDR
SOIC
D
8
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
TLC4502CDR
SOIC
D
8
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
TLC4502IDR
SOIC
D
8
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
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Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
27-Aug-2010
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
TLC4501AIDR
SOIC
D
8
2500
346.0
346.0
29.0
TLC4501IDR
SOIC
D
8
2500
346.0
346.0
29.0
TLC4502ACDR
SOIC
D
8
2500
346.0
346.0
29.0
TLC4502AIDR
SOIC
D
8
2500
346.0
346.0
29.0
TLC4502CDR
SOIC
D
8
2500
346.0
346.0
29.0
TLC4502IDR
SOIC
D
8
2500
346.0
346.0
29.0
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Pack Materials-Page 2
MECHANICAL DATA
MCER001A – JANUARY 1995 – REVISED JANUARY 1997
JG (R-GDIP-T8)
CERAMIC DUAL-IN-LINE
0.400 (10,16)
0.355 (9,00)
8
5
0.280 (7,11)
0.245 (6,22)
1
0.063 (1,60)
0.015 (0,38)
4
0.065 (1,65)
0.045 (1,14)
0.310 (7,87)
0.290 (7,37)
0.020 (0,51) MIN
0.200 (5,08) MAX
Seating Plane
0.130 (3,30) MIN
0.023 (0,58)
0.015 (0,38)
0°–15°
0.100 (2,54)
0.014 (0,36)
0.008 (0,20)
4040107/C 08/96
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
This package can be hermetically sealed with a ceramic lid using glass frit.
Index point is provided on cap for terminal identification.
Falls within MIL STD 1835 GDIP1-T8
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