Difet OPA606 Wide-Bandwidth OPERATIONAL AMPLIFIER

®
OPA606
Wide-Bandwidth Difet ®
OPERATIONAL AMPLIFIER
FEATURES
APPLICATIONS
● WIDE BANDWIDTH: 13MHz typ
● OPTOELECTRONICS
● HIGH SLEW RATE: 35V/µs typ
● LOW BIAS CURRENT: 10pA max at
TA = +25°C
● LOW OFFSET VOLTAGE: 500µV max
● LOW DISTORTION: 0.0035% typ at 10kHz
● DATA ACQUISITION
● TEST EQUIPMENT
● AUDIO AMPLIFIERS
DESCRIPTION
The OPA606 is a wide-bandwidth monolithic
dielectrically-isolated FET (Difet®) operational amplifier featuring a wider bandwidth and lower bias current than BIFET® LF156A amplifiers. Bias current is
specified under warmed-up and operating conditions,
as opposed to a junction temperature of +25°C.
1
Trim
Laser-trimmed thin-film resistors offer improved offset voltage and noise performance.
The OPA606 is internally compensated for unity-gain
stability.
7
5
Trim
+VCC
2
–In
3
+In
6
Simplified Circuit
4
VOUT
–VCC
Difet®; Burr-Brown Corp.
BIFET®; National Semiconductor Corp.
SBOS143
International Airport Industrial Park • Mailing Address: PO Box 11400
Tel: (520) 746-1111 • Twx: 910-952-1111 • Cable: BBRCORP •
• Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd. • Tucson, AZ 85706
Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132
©
PDS-598D
1985 Burr-Brown Corporation
www.BDTIC.com/TI
Printed in U.S.A. July, 1995
SPECIFICATIONS
ELECTRICAL
At VCC = ±15VDC and TA = +25°C unless otherwise noted.
OPA606KM
PARAMETER
FREQUENCY RESPONSE
Gain Bandwidth
Full Power Response
Slew Rate
Settling Time(1): 0.1%
0.01%
Total Harmonic Distortion
INPUT OFFSET VOLTAGE(2)
Input Offset Voltage
Average Drift
Supply Rejection
CONDITIONS
MIN
TYP
Small Signal
20Vp-p, RL = 2kΩ
VO = ±10V,
RL = 2kΩ
Gain = –1,
RL = 2kΩ
10V Step
G = +1, 20Vp-p
RL = 2kΩ
f = 10kHz
10
12.5
515
33
VCM = 0VDC
TA = TMIN to TMAX
VCC = ±10V to ±18V
22
82
OPA606LM
MAX
MIN
TYP
11
13
550
35
25
OPA606KP
MAX
MIN
TYP
9
12
470
30
MHz
kHz
V/µs
20
MAX
UNITS
1.0
1.0
1.0
µs
2.1
0.0035
2.1
0.0035
2.1
0.0035
µs
%
±180
±5
100
±10
±1.5mV
±500
±5
±79
±100
±3
104
±6
90
±3mV
±32
±300
±10
90
±32
±100
µV
µV/°C
dB
µV/V
80
BIAS CURRENT(2)
Input Bias Current
VCM = 0VDC
±7
±15
±5
±10
±8
±25
pA
OFFSET CURRENT(2)
Input Offset Current
VCM = 0VDC
±0.6
±10
±0.4
±5
±1
±15
pA
100% tested (L)
100% tested (L)
100% tested (L)
37
21
14
12
11
1.3
1.5
30
20
13
11
10.5
1.2
1.3
40
28
16
13
13
1.5
2
37
21
14
12
11
1.3
1.7
nV/√Hz
nV/√Hz
nV/√Hz
nV/√Hz
nV/√Hz
µVrms
fA/√Hz
1013 || 1
1014 || 3
1013 || 1
1014 || 3
1013 || 1
1014 || 3
Ω || pF
Ω || pF
NOISE
Voltage, fO = 10Hz
100Hz
1kHz
10kHz
20kHz
fB = 10Hz to 10kHz
Current, fO = 0.1Hz thru 20kHz
(3)
(3)
(3)
(3)
IMPEDANCE
Differential
Common-Mode
VOLTAGE RANGE
Common-Mode Input Range
Common-Mode Rejection
OPEN-LOOP GAIN, DC
Open-Loop Voltage Gain
RATED OUTPUT
Voltage Output
Current Output
Output Resistance
Load Capacitance Stability
Short Circuit Current
Operating
θJA
±10.5
80
±11.5
95
±11
85
±11.6
96
±10.2
78
±11
90
V
dB
RL ≥ 2kΩ
95
115
100
118
90
110
dB
RL = 2kΩ
VO = ±10VDC
DC, Open Loop
Gain = +1
±11
±5
±12.2
±10
40
1000
20
±12
±5
±12.6
±10
40
1000
20
±11
±5
±12
±10
40
1000
20
V
mA
Ω
pF
mA
±15
VDC
10
POWER SUPPLY
Rated Voltage
Voltage Range,
Derated Performance
Current, Quiescent
TEMPERATURE RANGE
Specification
VIN = ±10VDC
10
±15
±5
IO = 0mADC
Ambient Temperature
KM, KP, LM
Ambient Temperature
6.5
0
–55
10
±15
±18
9.5
±5
+70
+125
0
–55
200
6.2
±18
9
±5
+70
+125
0
–40
6.5
200
155
±18
10
VDC
mA
+70
+85
°C
°C
°C/W
NOTES: (1) See settling time test circuit in Figure 2. (2) Offset voltage, offset current, and bias current are measured with the units fully warmed up. (3) Sample
tested–this parameter is guaranteed on L grade only.
®
OPA606
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2
ELECTRICAL (FULL TEMPERATURE RANGE SPECIFICATIONS)
At VCC = ±15VDC and TA = TMIN to TMAX unless otherwise noted.
OPA606KM
PARAMETER
CONDITIONS
MIN
TEMPERATURE RANGE
Specification Range
Ambient Temp.
0
INPUT OFFSET VOLTAGE(1)
Input Offset Voltage
Average Drift
Supply Rejection
VCM = 0VDC
VCC = ±10V to ±18V
80
TYP
OPA606LM
MAX
MIN
+70
0
±400
±5
98
±13
±2mV
TYP
OPA606KP
MAX
MIN
+70
0
TYP
±750
±5
±100
±335
±3
100
±10
±56
±750
±10
95
±18
85
78
MAX
UNITS
+70
°C
±3.5mV
±126
µV
µV/°C
dB
µV/V
BIAS CURRENT(1)
Input Bias Current
VCM = 0VDC
±158
±339
±113
±226
±181
±566
pA
OFFSET CURRENT(1)
Input Offset Current
VCM = 0VDC
±14
±226
±9
±113
±23
±339
pA
VOLTAGE RANGE
Common-Mode Input Range
Common-Mode Rejection
VIN = ±10VDC
±10.4
78
±11.4
92
±10.9
82
±11.5
95
±10
75
±10.9
88
V
dB
OPEN-LOOP GAIN, DC
Open-Loop Voltage Gain
RL ≥ 2kΩ
90
106
95
112
88
104
dB
RATED OUTPUT
Voltage Output
Current Output
RL = 2kΩ
VO = ±10VDC
±10.5
±5
±12
±10
±11.5
±5
±12.4
±10
±10.4
±5
±11.8
±10
V
mA
POWER SUPPLY
Current, Quiescent
IO = 0mADC
6.6
10
6.4
9.5
6.6
10.5
mA
NOTES: (1) Offset voltage, offset current, and bias current are measured with the units fully warmed up.
ABSOLUTE MAXIMUM RATINGS
CONNECTION DIAGRAMS
Supply Voltage .............................................................................. ±18VDC
Internal Power Dissipation (1) ......................................................... 500mW
Differential Input Voltage ............................................................... ±36VDC
Input Voltage Range ..................................................................... ±18VDC
Storage Temperature Range ................................... M = –65°C to +150°C
P = –40°C to +85°C
Operating Temperature Range ................................ M = –55°C to +125°C
P = –40°C to +85°C
Lead Temperature (soldering, 10s) ................................................ +300°C
(3)
Output Short-Circuit Duration ................................................ Continuous
Junction Temperature .................................................................... +175°C
Top View
TO-99
NC
8
Offset Trim
1
–In
7
2
6 Output
3
NOTES: (1) Packages must be derated based on θJC = 15°C/W or θJA. (2)
For supply voltages less than ±18VDC, the absolute maximum input
voltage is equal to the negative supply voltage. (3) Short circuit may be to
power supply common only. Rating applies to +25°C ambient. Observe
dissipation limit and TJ.
+VCC
5
+In
Offset Trim
4
–VCC
Case is connected to VCC.
PACKAGE INFORMATION
Top View
MODEL
PACKAGE
PACKAGE DRAWING
NUMBER(1)
OPA606KM
OPA606LM
OPA606KP
TO-99
TO-99
Plastic DIP
001
001
006
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix D of Burr-Brown IC Data Book.
DIP
Offset Trim
1
8
NC
–In
2
7
+VCC
+In
3
6
Output
–VCC
4
5
Offset Trim
ORDERING INFORMATION
MODEL
PACKAGE
TEMPERATURE
RANGE
OPA606KM
OPA606LM
OPA606KP
TO-99
TO-99
Plastic DIP
0°C to 70°C
0°C to 70°C
0°C to 70°C
®
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3
OPA606
DICE INFORMATION
PAD
FUNCTION
1
2
3
4
5
6
7
8
NC
Offset Trim
–In
+In
–VS
Offset Trim
Output
+VS
NC
No Connection
Substrate Bias: No Connection.
MECHANICAL INFORMATION
Die Size
Die Thickness
Min. Pad Size
MILS (0.001")
MILLIMETERS
65 x 54 ±5
20 ±3
4x4
1.65 x 1.37 ±0.13
0.51 ±0.08
0.10 x 0.10
Backing
Transistor Count
OPA606 DIE TOPOGRAPHY
None
43
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
®
OPA606
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4
TYPICAL PERFORMANCE CURVES
TA = +25°C, VCC = ±15VDC unless otherwise noted.
OPEN-LOOP FREQUENCY RESPONSE
INPUT VOLTAGE NOISE SPECTRAL DENSITY
140
1k
LM
120
80
θ
–90
60
Gain
40
–135
Voltage Noise (nV/ √Hz)
Voltage Gain (dB)
100
Phase Shift (degrees)
–45
100
10
20
100
1k
10k
100k
1M
10M
100
1k
10k
Frequency (Hz)
BIAS AND OFFSET CURRENT vs TEMPERATURE
BIAS AND OFFSET CURRENT vs
INPUT COMMON-MODE VOLTAGE
1nA
1nA
100
100
IB
10
IOS
1
10
Bias Current (pA)
10nA
Bias Current (pA)
10
Frequency (Hz)
10nA
100k
1nA
1nA
100
100
IB
10
10
I OS
1
0.1
–50
–25
0.1
125
Ambient Temperature (°C)
POWER SUPPLY REJECTION
vs FREQUENCY
COMMON-MODE REJECTION
vs FREQUENCY
25
50
75
100
–15
140
140
120
120
100
+VCC
80
–VCC
60
1
1
–5
0
5
Common-Mode Voltage (V)
0
Common-Mode Rejection (dB)
Power Supply Rejection (dB)
1
–180
100M
Offset Current (pA)
10
Offset Current (pA)
0
40
20
0
–10
10
15
100
80
60
40
20
0
10
100
1k
10k
100k
1M
10M
100M
10
100
1k
Frequency (Hz)
10k
100k
1M
10M
100M
Frequency (Hz)
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OPA606
TYPICAL PERFORMANCE CURVES
(CONT)
TA = +25°C, VCC = ±15V unless otherwise noted.
GAIN-BANDWIDTH AND SLEW RATE
vs SUPPLY VOLTAGE
MAXIMUM UNDISTORTED OUTPUT
VOLTAGE vs FREQUENCY
20
10
GBW
35
12
S/R
30
10
25
8
0
10k
100k
1M
0
10M
5
SUPPLY CURRENT vs TEMPERATURE
15
20
OPEN-LOOP GAIN vs TEMPERATURE
8
130
7
120
Voltage Gain (dB)
6
5
110
100
4
90
–75
–50
–25
0
25
50
75
100
–75
125
–50
–25
0
25
50
75
100
Ambient Temperature (°C)
Ambient Temperature (°C)
GAIN-BANDWIDTH AND SLEW RATE
vs TEMPERATURE
OPEN-LOOP GAIN AND SUPPLY CURRENT
vs SUPPLY VOLTAGE
125
38
16
10
9
120
GBW
S/R
Slew Rate (V/µs)
34
12
Voltage Gain (dB)
36
14
8
7
110
6
32
10
5
100
30
8
–75
–50
–25
0
25
50
75
100
4
0
125
5
10
Supply Voltage (±VCC)
Ambient Temperature (°C)
®
OPA606
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6
15
20
Supply Current (mA)
Supply Current (mA)
10
Supply Voltage (±VCC)
Frequency (Hz)
Gain-Bandwidth (MHz)
Slew Rate (V/µs)
Gain-Bandwidth (MHz)
Output Voltage (V p-p)
40
14
30
TYPICAL PERFORMANCE CURVES (CONT)
TA = +25°C, VCC = ±15V unless otherwise noted.
TOTAL HARMONIC DISTORTION
vs FREQUENCY
SETTLING TIME vs CLOSED-LOOP GAIN
10
Total Harmonic Distortion (%)
0.01
Settling Time (µs)
8
6
4
2
0
G = +1
VO = 7Vrms
0.008
0.006
0.004
0.002
Test Equipment
Limit
0
1
10
100
1k
100
1k
Closed-Loop Gain (V/V)
100k
LARGE SIGNAL TRANSIENT RESPONSE
SMALL SIGNAL TRANSIENT RESPONSE
+15
+80
+40
Output Voltage (V)
Output Voltage (mV)
10k
Frequency (Hz)
0
0
+40
–15
–80
0
0.5
0
1
2.5
Time (µs)
Time (µs)
APPLICATIONS INFORMATION
5
+VCC
(1)
OFFSET VOLTAGE ADJUSTMENT
The OPA606 offset voltage is laser-trimmed and will require
no further trim for most applications. As with most amplifiers, externally trimming the remaining offset can change
drift performance by about 0.5µV/°C for each millivolt of
adjusted offset. Note that the trim (Figure 1) is similar to
operational amplifiers such as LF156 and OP-16. The
OPA606 can replace most other amplifiers by leaving the
external null circuit unconnected.
7
2
3
NOTE: (1) 10kΩ to 1MΩ
Trim Potentiometer
(100kΩ Recommended)
100kΩ
1
5
OPA606
4
6
±50mV Typical
Trim Range
–VCC
FIGURE 1. Offset Voltage Trim.
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OPA606
INPUT PROTECTION
Static damage can cause subtle changes in amplifier input
characteristics without necessarily destroying the device. In
precision operational amplifiers (both bipolar and FET types),
this may cause a noticeable degradation of offset voltage and
drift. Static protection is recommended when handling any
precision IC operational amplifier.
If the input voltage exceeds the amplifier’s negative supply
voltage, input current limiting must be used to prevent
damage.
Noninverting
Buffer
2
2
6
OPA606
3
In
6
OPA606
Out
3
Out
In
TO-99 Bottom View
Inverting
In
4 5
2
6
OPA606
3
CIRCUIT LAYOUT
6
3
7
2
Out
8
1
Wideband amplifiers require good circuit layout techniques
and adequate power supply bypassing. Short, direct connections and good high frequency bypass capacitors (ceramic or
tantalum) will help avoid noise pickup or oscillation.
Mini-DIP Bottom View
BOARD LAYOUT
FOR INPUT GUARDING
Guard top and bottom of board.
Alternate: use Teflon® standoff
for sensitive input pins.
GUARDING AND SHIELDING
As in any situation where high impedances are involved,
careful shielding is required to reduce “hum” pickup in input
leads. If large feedback resistors are used, they should also
be shielded along with the external input circuitry.
Leakage currents across printed circuit boards can easily
exceed the bias current of the OPA606. To avoid leakage
problems, it is recommended that the signal input lead of the
OPA606 be wired to a Teflon® standoff. If the OPA606 is to
be soldered directly into a printed circuit board, utmost care
must be used in planning the board layout.
A “guard” pattern should completely surround the high
impedance input leads and should be connected to a low
impedance point which is at the signal input potential (see
Figure 3).
1
8
Teflon® E. I. Du Pont
de Nemours & Co.
7
2
6
3
4
5
FIGURE 3. Connection of Input Guard.
APPLICATIONS CIRCUITS
10kΩ
+15VDC
0.1µF
1kΩ
2
Input
3
BANDWIDTH > 1MHz
TS ≈ 1.8µsec (0.01%)
GAIN = –10V/V
7
6
OPA606
4
Output
0.1µF
0.1%
–15VDC
2kΩ
+15V
FIGURE 4. Inverting Amplifier.
+5V
0.1%
2
–5V
2kΩ
0.1%
5kΩ
–15V
3
Summing
Node
7
6
DUT
4
2N4416
100pF
3kΩ
0.1%
+15VDC
0.1µF
VOUT
G = –1
2
5kΩ
Scope
2N4416
+15V
Input
Bandwidth > 12MHz
Gain = +1V/V
RIN ≈ 1013Ω
2k Ω
3
7
6
OPA606
4
0.1µF
–15VDC
FIGURE 5. Noninverting Buffer.
FIGURE 2. Settling Time Test Circuit.
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8
Output
1MΩ
10kΩ
C1
20pF
+15V
Current
Input
i
2
3
OPA606
6
4
1MΩ
i
2
Output
Voltage
EO
7
3
Input
Load
R1
6
OPA606
100Ω
EO = |i| R = 1V/µA
Optimize response for particular
load condition with C1 and R1.
–15V
0
FIGURE 8. Isolating Load Capacitance from Buffer.
0
Differential Gain = 1 + (2 x 10kΩ)/RG
3
FIGURE 6. Absolute Value Current-to-Voltage Circuit.
OPA606
2
6
10kΩ
≈ 0.2pF if necessary to
prevent gain peaking
3 Metal-film
resistors
150kΩ
150kΩ
RG
2kΩ
Differential
Input
Differential
Output
10kΩ
150kΩ
2
+15V
0.01µF
OPA606
3
1. Bandwidth ≈1.2MHz
2. Differential Gain = 11
3. Differential Output ≈ 50Vp-p
4. Differential Slew Rate ≈ 65V/µs
2
7
6
Pin Photodiode
OPA606
Motorola
3
0.01µF
MRD721
4
0.1µF
–15V
10kΩ
+15V
6
Output
FIGURE 9. Differential Input/Differential Output Amplifier.
1. Circuit must be well shielded.
2. Stray capacitance is critical.
3. Bandwidth ≈ 1MHz
4. Output ≈ 22V/mW/cm2
FIGURE 7. High-Speed Photodetector.
49.9Ω
2.49kΩ
Total Mid-band Gain = 40dB
See: "Topology Considerations for RIAA Phono Preamplifiers".
AES reprint #1719.
October 1980, by Walter G. Jung
2
Moving Magnet
Cartridge
3
OPA37EJ
6
G ≈ 51V/V
47.5kΩ
7.32kΩ
G ≈ 20V/V
150pF (1)
3
0.1µF
2
OPA606
6
10µF Output
1.05kΩ
3.74kΩ
10kΩ
1. Load R and C per cartridge manufacturer's recommendations.
2. Use metal film resistors and plastic film capacitors.
3. Bypass ±VCC adequately.
0.3µF
200Ω
FIGURE 10. Low Noise/Low Distortion RIAA Preamplifier.
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OPA606
IMPORTANT NOTICE
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subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
Customers are responsible for their applications using TI components.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
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intellectual property right of TI covering or relating to any combination, machine, or process in which such
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