NBY98:9 ดᒙఎਈࡼcpptuࢯஂLj ૹ߅4ᄰࡸྸහདࣅLj᎖UGU! MDE ``````````````````````````````````` গၤ
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NBY98:9 ดᒙఎਈࡼcpptuࢯஂLj ૹ߅4ᄰࡸྸහདࣅLj᎖UGU! MDE ``````````````````````````````````` গၤ
19-0971; Rev 1; 6/08 ৰۇ భᄋຶ ดᒙఎਈࡼcpptuࢯஂLj ૹ߅4ᄰࡸྸහདࣅLj᎖UGU! MDE ``````````````````````````````````` ᄂቶ NBY98:9۞ጙവቶถဍኹᆮኹĂጙവႥᏥႯहࡍ ĂጙৈᎌऻጵပࡀࡼၫᔊభࢯWDPNቅᓰĂጙ ৈJ3Dాጲૺጙവኹ࢟ຳᓞધྸහདࣅăকୈள ਭᎁછLjభ᎖ۡෞᄏ)UGU*ጘመာ)MDE*ă ♦ 2/9Wᒗ6/6W! JO࢟Ꮞ࢟ኹपᆍ ♦ 2/9Wᒗ5/1W! WEEၒྜྷ࢟ኹपᆍ ♦ 2/3NI{࢟ഗෝါဍኹࢯஂ Ⴅၾზሰ። ดᒙ31WĂ2/:BĂ261nΩ NPTGFU ♦ Ⴅ)31NI{*ᏥႯहࡍ ±261nBၒ߲࢟ഗ ♦ ᎌྸහ൝࢟വࡼኹདࣅ ,56Wᒗ.36Wၒ߲ ڼ७ᆐ76W! )ᔢࡍᒋ* ৢၒ߲ߠ࢟࢟ ♦ భ߈ܠWDPNቅᓰ 8ᆡభࢯஂᇢ࢟ഗၒ߲ J3Dా FFQSPNᒙࡀ ♦ ེਭᏲۣઐ ဍኹቯED.EDᓞધᆐෂۇᏎདࣅJDᄋᆮࢾࡼ࢟Ꮞ࢟ ኹăఎਈຫൈᏤဧިቃቯ࢟ঢਜ਼ჿࠣ࢟ྏă࣪᎖ ൴ߡঌᏲLjྙᏎདࣅঌᏲLj࢟ഗෝါ఼ᒜஉ৩ถ৫ ᄋႥࡼၾზሰ።ăকဍኹᓞધᎌྟࣅਜ਼࢟ഗ ሢᒜถă ࡍ࢟ഗᏥႯहࡍଐ᎖དࣅMDE۳)ۇWDPN*Ljहࡍ భᄋ୷ࡼၒ߲࢟ഗ)±261nB*Ăኹڼൈ)56W0μt*Ă ࡒ)31NI{*ጲૺ൸ڼ७ၒྜྷĂၒ߲ᄂቶă భ߈ܠWDPNቅᓰᏴᅪೌݝᒗWDPNहࡍࡼ࢟ᔜॊ ኹLjభ߈ܠᇢ࢟ഗ᎖ࢯᑳWDPNၒ߲࢟ኹLjดݝ8ᆡ ၫ0ෝᓞધ)EBD*఼ᒜᇢ࢟ഗăEBDᎧCPPTU߅܈ಿܤછLj ۣᑺᏴྀੜᔫᄟୈሆᎌࢯቶăቅᓰJDࡒᎌ FFQSPNLj᎖ۣࡀჅገཇࡼWDPN࢟ኹăMDEෂۇᎧܠ ߈࢟വᒄମݧ3ሣါJ3DాᄰቧLj࠭ऎဧෂೌࡼۇ ୭ᔢLjᎌᓐ᎖଼છညޘഗ߈ă ``````````````````````````` ଼છᔫ࢟വ ኹĂ࢟ຳᓞધྸහདࣅ᎖དࣅUGUෂࡼۇᐜདࣅ ă4വၒ߲ࡼڼ७ᆐ76W )ᔢࡍᒋ*LjᏴ,56W )ᔢࡍᒋ*ᒗ .36W )ᔢቃᒋ*ᒄମLjభጲႥདࣅ࢟ྏঌᏲăᆐଢ଼ࢅLj ೝৈઑݗၒ߲Ᏼᓨზखညܤછဟถ৫ৢߠ࢟࢟ă VIN VMAIN 50kΩ SHDN IN LX DISH NBY98:9ᄋ47୭ĂۡቯRGOॖᓤLjᔢࡍࣞ1/9nnLj ऻޟးިۡMDEෂۇă ``````````````````````````````````` ። VP VN 1kΩ CPV OE SYSTEM OECON VN MDEመာෂۇ PGND FB COMP SCAN DRIVER LOGIC AND GATE DRIVERS STV ܊࢟۾ฎመာ 1.9A STEP-UP REG AGND GON GOFF VP STVP BOOST CKVCS NEG PANEL ``````````````````````````````` ࢾ৪ቧᇦ PART TEMP RANGE PINPACKAGE 36 Thin QFN MAX8798ETX+ -40°C to +85°C 6mm x 6mm CKVB VCOM CKVBCS TO VCOM BACKPLANE CKV PKG CODE VL 3.3V LINEAR REG VDD VIN T-3666M-1 VCOM CALIBRATOR 7 GND POS BGND OUT SDA I2C BUS SCL SCLS WPP WPN SET ________________________________________________________________ Maxim Integrated Products 1 ۾ᆪဵNbyjnᑵါ፞ᆪᓾ೯ࡼፉᆪLjNbyjn࣪ݙडፉᒦࡀᏴࡼތፊᎅࠥޘညࡼࡇᇙঌᐊă༿ᓖፀፉᆪᒦభถࡀᏴᆪᔊᔝᒅ डፉࡇᇙLjྙኊཀྵཱྀྀੜࠤᎫࡼᓰཀྵቶLj༿ݬఠ Nbyjnᄋࡼ፞ᆪۈᓾ೯ă Ⴣནॅዹອਜ਼ᔢቤࡼۈၫᓾ೯Lj༿षᆰNbyjnࡼᓍǖxxx/nbyjn.jd/dpn/doă NBY98:9 ``````````````````````````````````` গၤ NBY98:9 ดᒙఎਈࡼcpptuࢯஂLj ૹ߅4ᄰࡸྸහདࣅLj᎖UGU! MDE ABSOLUTE MAXIMUM RATINGS IN, VL, SHDN to AGND .........................................-0.3V to +7.5V VDD, SDA, SCL, SCLS, WPN, WPP, SET to GND...-0.3V to +4.0V OECON, CPV, OE, STV to AGND..........................-0.3V to +4.0V COMP, FB to AGND ......................................-0.3V to (VL + 0.3V) DISH to GND ............................................................-6V to +2.0V LX to PGND ............................................................-0.3V to +20V OUT, VCOM, NEG, POS to BGND........-0.3V to (BOOST + 0.3V) PGND, BGND, AGND to GND...............................-0.3V to +0.3V GON to AGND ........................................................-0.3V to +50V GOFF to AGND .............................................-30V to (VIN + 0.3V) GON to GOFF ......................................................................+70V BOOST to BGND ....................................................-0.3V to +20V CKV, CKVB, STVP, CKVCS, CKVBCS to AGND..................(GOFF - 0.3V) to (GON + 0.3V) LX, PGND RMS Current Rating.............................................2.4A Continuous Power Dissipation (TA = +70°C) NiPd Lead Frame with Nonconductive Epoxy 36-Pin, 6mm x 6mm Thin QFN (derate 27.2mW/°C above +70°C) .........................2179.8mW Operating Temperature Range ...........................-40°C to +85°C Junction Temperature ......................................................+150°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VIN = VDD = VSHDN = +3V, circuit of Figure 2, VBOOST = 8V, VGON = 23V, VGOFF = -12V, VPOS = 0, VNEG = 1.5V, VOE = VCPV = VSTV = VOECON = 0, TA = 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER CONDITIONS VDD Input Voltage Range VDD Quiescent Current MIN TYP 1.8 VDD = 3V MAX UNITS 4.0 V 4 10 μA 1.3 1.75 V VDD Undervoltage Lockout VDD rising; typical hysteresis 100mV IN Input Voltage Range (Note 1) IN Quiescent Current IN Undervoltage Lockout VIN = 3V, VFB = 1.5V, not switching IN rising; typical hysteresis 100mV Thermal Shutdown Rising edge, hysteresis = 15 oC 160 1.8 6.0 V 0.04 0.1 mA 1.4 1.75 V o C BOOTSTRAP LINEAR REGULATOR (VL) VL Output Voltage I VL = 100μA 3.15 3.3 3.45 VL Undervoltage Lockout VL rising, typical hysteresis 200mV 2.4 2.7 3.0 VL Maximum Output Current VFB = 1.1V 10 V V mA MAIN DC-DC CONVERTER BOOST Supply Current LX not switching, no load on VL LX switching, no load on VL Operating Frequency 990 Oscillator Maximum Duty Cycle FB Regulation Voltage FB Load Regulation 1.5 2 3 4 1170 1350 kHz % 88 92 96 1.216 1.235 1.254 V FB Line Regulation 0 < ILOAD < 200mA, transient only VIN = 1.8V to 5.5V, FB to COMP -0.15 -0.08 +0.15 %/V FB Input Bias Current VFB = 1.25V 50 125 200 nA FB Transconductance I = 5μA at COMP 70 160 280 μS FB Voltage Gain FB to COMP FB Fault Timer Trip Threshold Falling edge LX On-Resistance ILX = 1.2A LX Leakage Current VLX = 18V LX Current Limit Duty cycle = 65% Current-Sense Transresistance Soft-Start Period 2 -1 mA % 2400 0.96 V/V 1 1.04 V 150 300 m μA 0.01 20 1.6 1.9 2.2 A 0.25 0.42 0.55 V/A 3 _______________________________________________________________________________________ ms ดᒙఎਈࡼcpptuࢯஂLj ૹ߅4ᄰࡸྸහདࣅLj᎖UGU! MDE (VIN = VDD = VSHDN = +3V, circuit of Figure 2, VBOOST = 8V, VGON = 23V, VGOFF = -12V, VPOS = 0, VNEG = 1.5V, VOE = VCPV = VSTV = VOECON = 0, TA = 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER CONDITIONS MIN TYP MAX UNITS 18 V 19 19.9 V 1.4 V OPERATIONAL AMPLIFIER BOOST Supply Range 5 BOOST Overvoltage Fault Threshold (Note 2) BOOST Undervoltage Fault Threshold (Note 3) 1.0 1V < (VNEG, VPOS) < (VBOOST - 1V) 1V < (VNEG, VPOS) < (VBOOST - 1V) 120 Large-Signal Voltage Gain Common-Mode Rejection Ratio 18.1 dB 75 dB 1V < (VNEG, VPOS) < (VBOOST - 1V) -25 -5 +25 VBOOST/2 -15 -2.5 +12 Input Bias Current 1V < (VNEG, VPOS) < (VBOOST - 1V) -50 +50 nA Input Common-Mode Voltage Range 1V < (VNEG, VPOS) < (VBOOST - 1V) 0 VBOOST V VCOM Output Voltage Swing High I VCOM = 5mA VCOM Output Voltage Swing Low I VCOM = -5mA 50 VCOM Output-Current High VVCOM = VBOOST - 1V -75 mA VCOM Output-Current Low VVCOM = 1V +75 mA Slew Rate 1V < (VNEG, VPOS) < (VBOOST - 1V) 40 V/μs -3dB Bandwidth 1V < (VNEG, VPOS) < (VBOOST - 1V) 20 MHz Input Offset Voltage VCOM Short-Circuit Current VBOOST VBOOST - 100 - 50 Short to VBOOST/2, sourcing 50 150 Short to VBOOST/2, sinking 50 150 mV mV 100 mV mA PROGRAMMABLE VCOM CALIBRATOR GON Input Range 16.1 GON Threshold to Enable Program Rising edge, 60mV hysteresis SET Voltage Resolution SET Differential Nonlinearity 15.6 V +2 LSB +2 LSB +3 LSB 120 μA Bits -2 -1 SET Full-Scale Error -3 +1 SET Current To GND, VBOOST = 18V 8.5 170.0 To GND, VBOOST = 6V 2.5 50.0 VSET/VBOOST Voltage Ratio DAC full scale OUT Leakage Current When OUT is off OUT Settling Time To ±0.5 LSB error band VSET + 0.5V OUT Voltage Range EEPROM Write Cycles V 16.0 7 Monotonic overtemperature SET Zero-Scale Error SET External Resistance (Note 4) 45.0 (Note 5) 1000 k 0.05 V/V 1 nA 20 μs 18 V — _______________________________________________________________________________________ 3 NBY98:9 ELECTRICAL CHARACTERISTICS (continued) NBY98:9 ดᒙఎਈࡼcpptuࢯஂLj ૹ߅4ᄰࡸྸහདࣅLj᎖UGU! MDE ELECTRICAL CHARACTERISTICS (continued) (VIN = VDD = VSHDN = +3V, circuit of Figure 2, VBOOST = 8V, VGON = 23V, VGOFF = -12V, VPOS = 0, VNEG = 1.5V, VOE = VCPV = VSTV = VOECON = 0, TA = 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER CONDITIONS MIN TYP MAX UNITS 0.3 x VDD V 2-WIRE INTERFACE Logic-Input Low Voltage (VIL) SDA, SCL, WPN, VDD = 3V Logic-Input High Voltage (VIH) SDA, SCL, WPN, VDD = 3V WPP Logic-Output Low Voltage IWPP = 1mA WPP Logic-Output High Voltage IWPP = 1mA 0.7 x VDD V +0.1 VDD 0.1 SDA Logic-Output Low Sink Current SDA forced to 3.3V 6 Logic Input Current SDA, SCL, SCL_S,WPN to VDD or GND -1 Input Capacitance SDA, SCL, SCL_S V V mA +1 μA 500 kHz 5 pF SCL Frequency (fCLK) DC SCL High Time (tCLH) SCL Low Time (tCLL) 600 ns 1300 ns SDA, SCL, SCLS Rise Time (tR) CBUS = total capacitance of bus line in pF 20 + 10 x CBUS SDA, SCL, SCLS Fall Time (tF) CBUS = total capacitance of bus line in pF 20 + 10 x CBUS START Condition Hold Time (tHDSTT) 10% of SDA to 90% of SCL START Condition Setup Time (tSVSTT) 300 ns 300 ns 600 ns 600 ns Data Input Hold Time (tHDDAT) 0 ns Data Input Setup Time (tSUDAT) 150 ns STOP Condition Setup Time (tSVSTP) 600 ns 1300 ns Bus Free Time (tUF) Input Filter Spike Suppression (tSP) SCL-SCLS Switch Resistance SDA, SCL (Note 5) WPN = GND 250 1 WPN = VDD ns M 20 50 HIGH-VOLTAGE SCAN DRIVER GON Input Voltage Range 12 45 V GOFF Input Voltage Range -25 -2 V GON to GOFF VGON - VGOFF 65 V GON Supply Current STV, CPV, OE, OECON = AGND 250 350 μA GOFF Supply Current STV, CPV, OE, OECON = AGND 100 200 μA Output-Voltage Low CKV, CKVB, STVP, -5mA output current Output-Voltage High CKV, CKVB, STVP, 5mA output current Propagation Delay Between OE VCPV = 0, VSTV = 0, CLOAD = 4.7nF, 50 Rising Edge and CKV/CKVB Edge 4 VGOFF + 0.2 VGOFF + 0.05 V VGON - 0.05 VGON - 0.2 V 250 450 ns _______________________________________________________________________________________ ดᒙఎਈࡼcpptuࢯஂLj ૹ߅4ᄰࡸྸහདࣅLj᎖UGU! MDE (VIN = VDD = VSHDN = +3V, circuit of Figure 2, VBOOST = 8V, VGON = 23V, VGOFF = -12V, VPOS = 0, VNEG = 1.5V, VOE = VCPV = VSTV = VOECON = 0, TA = 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER CONDITIONS Output Slew Rate CKV, CKVB Without charge sharing, STV = VDD, CLOAD = 4.7nF, 50 Propagation Delay Between STV and STVP CLOAD = 4.7nF STVP Output Slew Rate CLOAD = 4.7nF, 50 Charge-Sharing Discharge Path Resistance CKV to CKVCS and CKVB to CKVBCS DISH Turn-On Threshold Dish falling MIN TYP 20 40 250 20 MAX V/μs 450 40 250 STV, CPV, OE Input Low Voltage 400 -1.8 V 1.6 V V OECON Input Low Voltage 1.5 OECON Input High Voltage ns V/μs 0.8 STV, CPV, OE Input High Voltage UNITS 2.0 V V OECON Sink Current VOECON = 5V = VDD 0.4 STV, CPV, OE Input Current VSTV = VDD or GND, VCPV = VDD or GND, VOE = VDD or GND, VOECON = VDD or GND 0.8 mA -1 +1 μA CKV, CKVB, STVP Output High-Impedance Current VCKV = GON or GOFF, high impedance VCKVB = GON or GOFF, high impedance VCKVCS = GON or GOFF, high impedance VCKVBCS = GON or GOFF, high impedance VSTVP = GON or GOFF, high impedance -1 +1 μA 0.6 V CONTROL INPUTS SHDN Input Low Voltage Input High Voltage SHDN Input Current SHDN, 1.8V < VIN < 3.0V 1.8 SHDN, 3.0V < VIN < 5.5V VSHDN = 0 or 3V 2.0 V -1 +1 μA ELECTRICAL CHARACTERISTICS (VIN = VDD = VSHDN = +3V, circuit of Figure 2, VBOOST = 8V, VGON = 23V, VGOFF = -12V, VPOS = 0, VNEG = 1.5V, VOE = VCPV = VSTV = VOECON = 0, TA = -40°C to +85°C, unless otherwise noted.) (Note 6) PARAMETER CONDITIONS VDD Input Voltage Range MIN 1.8 TYP MAX UNITS 4.0 V 10 μA 1.75 V VDD Quiescent Current VDD = 3V VDD Undervoltage Lockout VDD rising; typical hysteresis 100mV IN Input Voltage Range (Note 1) 6.0 V IN Quiescent Current VIN = 3V, VFB = 1.5V, not switching 0.1 mA IN Undervoltage Lockout VIN rising; typical hysteresis 100mV 1.75 V 1.8 _______________________________________________________________________________________ 5 NBY98:9 ELECTRICAL CHARACTERISTICS (continued) NBY98:9 ดᒙఎਈࡼcpptuࢯஂLj ૹ߅4ᄰࡸྸහདࣅLj᎖UGU! MDE ELECTRICAL CHARACTERISTICS (continued) (VIN = VDD = VSHDN = +3V, circuit of Figure 2, VBOOST = 8V, VGON = 23V, VGOFF = -12V, VPOS = 0, VNEG = 1.5V, VOE = VCPV = VSTV = VOECON = 0, TA = -40°C to +85°C, unless otherwise noted.) (Note 6) PARAMETER CONDITIONS MIN TYP MAX UNITS BOOTSTRAP LINEAR REGULATOR (VL) VL Output Voltage I VL = 100μA 3.15 3.45 V VL Undervoltage Lockout VVL rising, typical hysteresis 100mV 2.4 3.0 V MAIN DC-DC CONVERTER BOOST Supply Current LX not switching, no load on VL 2 LX switching, no load on VL 4 Operating Frequency Oscillator Maximum Duty Cycle FB Regulation Voltage FB Line Regulation VIN = 1.8V to 5.5V, FB to COMP FB Transconductance I = 5μA at COMP FB Fault-Timer Trip Threshold Falling edge LX On-Resistance ILX = 1.2A LX Current Limit Duty cycle = 65% mA 990 1350 kHz 88 96 % 1.216 1.254 V -0.15 +0.15 %/V 70 280 μS 0.96 1.04 V 300 m 1.6 2.2 A 5 18 V 18.1 19.9 V OPERATIONAL AMPLIFIER BOOST Supply Range BOOST Overvoltage Fault Threshold (Note 2) BOOST Undervoltage Fault Threshold (Note 3) Input Offset Voltage Input Common-Mode Voltage Range 1V < (VNEG, VPOS) < (VBOOST - 1V) 1V < (VNEG, VPOS) < (VBOOST - 1V) VCOM Output-Voltage Swing High I VCOM = 5mA VCOM Output-Voltage Swing Low I VCOM = -5mA VCOM Short-Circuit Current 1.4 V -25 +25 mV 0 VBOOST V VBOOST - 100 mV 100 Short to VBOOST/2, sourcing 50 Short to VBOOST/2, sinking 50 mV mA PROGRAMMABLE VCOM CALIBRATOR GON Input Range GON Threshold to Enable Program 16.1 Rising edge, 60mV hysteresis SET Voltage Resolution SET Differential Nonlinearity 45.0 16.0 7 Monotonic overtemperature V V Bits -2 +2 LSB SET Zero-Scale Error -1 +2 LSB SET Full-Scale Error -3 +3 LSB 120 μA To GND, VBOOST = 18V 8.5 170.0 To GND, VBOOST = 6V 2.5 50.0 VSET + 0.5V 18 SET Current SET External Resistance (Note 4) OUT Voltage Range EEPROM Write Cycles 6 (Note 5) 1000 _______________________________________________________________________________________ k V — ดᒙఎਈࡼcpptuࢯஂLj ૹ߅4ᄰࡸྸහདࣅLj᎖UGU! MDE (VIN = VDD = VSHDN = +3V, circuit of Figure 2, VBOOST = 8V, VGON = 23V, VGOFF = -12V, VPOS = 0, VNEG = 1.5V, VOE = VCPV = VSTV = VOECON = 0, TA = -40°C to +85°C, unless otherwise noted.) (Note 6) PARAMETER CONDITIONS MIN TYP MAX UNITS 0.3 x VDD V 2-WIRE INTERFACE Logic-Input Low Voltage (VIL) SDA, SCL, WPN, VDD = 3V Logic-Input High Voltage (VIH) SDA, SCL, WPN, VDD = 3V WPP Logic-Output Low Voltage IWPP = 1mA WPP Logic-Output High Voltage IWPP = -1mA SDA Logic-Output Low Sink Current SDA forced to 3.3V 0.7 x VDD V +0.1 V VDD 0.1 V 6 mA SCL Frequency (fCLK) DC SCL High Time (tCLH) 600 500 kHz ns SCL Low Time (tCLL) 1300 ns SDA, SCLS, and SCL Rise Time (tR) CBUS = total capacitance of bus line in pF 20 + 10 x CBUS 300 ns SDA, SCLS, and SCL Fall Time (tF) CBUS = total capacitance of bus line in pF 20 + 10 x CBUS 300 ns START Condition Hold Time (tHDSTT) 10% of SDA to 90% of SCL 600 ns START Condition Setup Time (tSVSTT) 600 ns Data Input Hold Time (tHDDAT) 0 ns Data Input Setup Time (tSUDAT) 150 ns STOP Condition Setup Time (tSVSTP) 600 ns Bus Free Time (tUF) Input Filter Spike Suppression (tSP) 1300 ns SCL-SCLS Switch Resistance SDA, SCL (Note 5) WPN = GND 250 1 WPN = VDD ns M 50 HIGH-VOLTAGE SCAN DRIVER GON Input Voltage Range 12 45 V GOFF Input Voltage Range -25 -2 V GON to GOFF VGON - VGOFF 65 V GON Supply Current STV, CPV, OE, OECON = AGND 350 μA GOFF Supply Current STV, CPV, OE, OECON = AGND 200 μA Output-Voltage Low CKV, CKVB, STVP, -5mA output current Output-Voltage High CKV, CKVB, STVP, 5mA output current VGOFF + 0.2 V VGON - 0.2 V _______________________________________________________________________________________ 7 NBY98:9 ELECTRICAL CHARACTERISTICS (continued) NBY98:9 ดᒙఎਈࡼcpptuࢯஂLj ૹ߅4ᄰࡸྸහདࣅLj᎖UGU! MDE ELECTRICAL CHARACTERISTICS (continued) (VIN = VDD = VSHDN = +3V, circuit of Figure 2, VBOOST = 8V, VGON = 23V, VGOFF = -12V, VPOS = 0, VNEG = 1.5V, VOE = VCPV = VSTV = VOECON = 0, TA = -40°C to +85°C, unless otherwise noted.) (Note 6) PARAMETER CONDITIONS Propagation Delay Between OE Rising Edge and CKV/CKVB Edge VCPV = 0, V STV = 0, CLOAD = 4.7nF, 50 Output Slew Rate CKV, CKVB Without charge sharing, STV = VDD, CLOAD = 4.7nF, 50 Propagation Delay Between STV and STVP CLOAD = 4.7nF MIN TYP MAX UNITS 450 ns 20 V/μs 450 20 ns STVP Output Slew Rate CLOAD = 4.7nF, 50 Charge-Sharing Discharge Path Resistance CKV to CKVCS and CKVB to CKVBCS V/μs 400 DISH Turn-On Threshold Dish falling -1.8 V 0.8 V STV, CPV, OE Input Low Voltage STV, CPV, OE Input High Voltage 1.6 V OECON Input Low Voltage 1.5 OECON Input High Voltage OECON Sink Current OECON = STV = VDD V 2.0 V 0.4 mA CONTROL INPUTS Input Low Voltage SHDN Input High Voltage SHDN, 1.8V < VIN < 3.0V SHDN, 3.0V < VIN < 5.5V 0.6 1.8 V V 2.0 Note 1: For 5.5V < VIN < 6.0V, use the MAX8798 for no longer than 1% of IC lifetime. For continuous operation, the input voltage should not exceed 5.5V. Note 2: Inhibits boost switching if VBOOST exceeds the threshold This fault is not latched. Note 3: Step-up regulator switching is not enabled until BOOST is above undervoltage threshold. Note 4: SET external resistor range is verified at DAC full scale. Note 5: Guaranteed by design, not production tested. Note 6: -40°C specs are guaranteed by design, not production tested. tHDSTT tR tCLH tCLL SCL tF SDA tHDDAT tSUDAT tSUSTP VIH VIL ᅄ2/! Fmfdusjdbm! Dibsbdufsjtujdtᒦࡼဟኔࢾፃ 8 _______________________________________________________________________________________ tBF ดᒙఎਈࡼcpptuࢯஂLj ૹ߅4ᄰࡸྸහདࣅLj᎖UGU! MDE STEP-UP REGULATOR OUTPUT LOAD REGULATION vs. LOAD CURRENT VIN = 2.2V 60 -0.2 VIN = 3.0V -0.4 70 SUPPLY CURRENT (μA) OUTPUT ERROR (%) 70 VIN = 2.2V -0.6 60 50 0.2A 40 30 20 50 -0.8 100 0 1 1000 10 LOAD CURRENT (mA) 3.0 IIN 2.5 40 1.20 35 1.19 25 20 IBOOST 15 1.0 10 0.5 5 0 10 35 60 1.18 200mA LOAD 1.17 1.16 1.15 1.14 1.13 1.12 1.10 1.6 85 TEMPERATURE (°C) 2.7 3.8 4.9 6.0 INPUT VOLTAGE (V) STEP-UP REGULATOR LOAD TRANSIENT RESPONSE (20mA TO 300mA) STEP-UP REGULATOR HEAVY-LOAD SOFT-START MAX8798 toc07 MAX8798 toc06 VLX 10V/div 0V LX 5V/div 0V VMAIN 5V/div IL 1A/div 0A 0V IL 500mA/div 0mV VMAIN (AC-COUPLED) 200mV/div 0A LOAD CURRENT 200mA/div SHDN CONTROL 5V/div 0V 2ms/div 6.0 1.11 0 -15 4.9 STEP-UP CONVERTER SWITCHING FREQUENCY vs. INPUT VOLTAGE 30 2.0 3.8 SUPPLY VOLTAGE (V) SWITCHING FREQUENCY (MHz) MAX8798 toc04 -40 2.7 LOAD CURRENT (mA) STEP-UP REGULATOR SUPPLY CURRENT vs. TEMPERATURE 1.5 1.6 1000 100 MAX8798 toc05 10 IN SUPPLY CURRENT (μA) 1 NO LOAD 10 -1.0 40 BOOST SUPPLY CURRENT (mA) EFFICIENCY (%) 0 VIN = 5.0V VIN = 3.0V 80 80 MAX8798 toc02 VIN = 5.0V 90 0.2 MAX8798 toc01 100 IN SUPPLY QUIESCENT CURRENT vs. IN SUPPLY VOLTAGE MAX8798 toc03 STEP-UP REGULATOR EFFICIENCY vs. LOAD CURRENT 0mA 100μs/div L = 3.6μH RCOMP = 100kΩ CCOMP1 = 220pF _______________________________________________________________________________________ 9 NBY98:9 ``````````````````````````````````````````````````````````````````````` ࢜ቯᔫᄂቶ (Circuit of Figure 2, VIN = 3V, TA = +25°C, unless otherwise noted.) ดᒙఎਈࡼcpptuࢯஂLj ૹ߅4ᄰࡸྸහདࣅLj᎖UGU! MDE NBY98:9 _________________________________________________________________________________________________ ࢜ቯᔫᄂቶ)ኚ* (Circuit of Figure 2, VIN = 3V, TA = +25°C, unless otherwise noted.) TIMER-DELAY LATCH RESPONSE TO OVERLOAD STEP-UP REGULATOR PULSED LOAD TRANSIENT RESPONSE (20mA TO 1A) MAX8798 toc09 MAX8798 toc08 L = 3.6μH RCOMP = 100k CCOMP1 = 220pF VLX 10V/div 0V VLX 10V/div 0V IL 1A/div 0A VMAIN 5V/div 0V 0mV VMAIN AC-COUPLED 200mV/div IL 2A/div 0A LOAD CURRENT 1A/div IMAIN 1A/div 0A 0A 10ms/div 10μs/div POWER-UP SEQUENCE OF ALL SUPPLY OUTPUTS BOOST SUPPLY CURRENT vs. BOOST SUPPLY VOLTAGE 0V VCOM 5V/div VIN 5V/div 0V 0V VGOFF 20V/div SHDN 5V/div SHDN CONTROL 0V 2.0 VIN = 5V 1.5 1.0 0.5 3 OPERATIONAL AMPLIFIER FREQUENCY RESPONSE 33pF LOAD 100pF LOAD 12 VBOOST = 8V 1.5 1.0 0 15 -40 -15 10 35 60 85 OUTPUT VOLTAGE (V) TEMPERATURE (°C) OPERATIONAL AMPLIFIER PSRR vs. FREQUENCY OPERATIONAL AMPLIFIER RAIL-TO-RAIL INPUT/OUTPUT WAVEFORMS -10 GAIN (dB) GAIN (dB) 2.0 MAX8798 toc15 VPOS 5V/div -15 -5 NO LOAD -10 -20 0V -25 -30 -15 -35 -20 VVCOM 5V/div -40 -25 0V -45 100 1k 10k FREQUENCY (Hz) 10 9 -5 0 VBOOST = 15V MAX8798 toc14 5 6 0 MAX8798 toc13 10 2.5 0.5 NO LOAD ON VMAIN 0 2ms/div 3.0 BOOST CURRENT (mA) VGON 20V/div VIN = 3.3V 2.5 3.5 MAX8798 toc11 0V 3.0 INPUT CURRENT (mA) 0V VL 5V/div VMAIN 5V/div BOOST SUPPLY CURRENT vs. TEMPERATURE MAX8798 toc12 MAX8798 toc10 100k 100 1k 10k 100k 10μs/div FREQUENCY (Hz) ______________________________________________________________________________________ ดᒙఎਈࡼcpptuࢯஂLj ૹ߅4ᄰࡸྸහདࣅLj᎖UGU! MDE OPERATIONAL AMPLIFIER LOAD TRANSIENT RESPONSE OPERATIONAL AMPLIFIER LARGE-SIGNAL STEP RESPONSE MAX8798 toc16 OPERATIONAL AMPLIFIER SMALL-SIGNAL STEP RESPONSE MAX8798 toc17 VVCOM (AC-COUPLED) 200mV/div 0mV MAX8798 toc18 VPOS (AC-COUPLED) 100mV/div VPOS 2V/div 0mV 0V IVCOM 100mA/div VCOM (AC-COUPLED) 100mV/div 0mV VCOM 2V/div 0mA 0V 2μs/div 200ns/div 200ns/div STV/STVP INPUT/OUTPUT WAVEFORMS WITH LOGIC INPUT CPV AND OE/CKV AND CKVB INPUT/OUTPUT WAVEFORMS WITH LOGIC INPUT (STV = 0V, CLOAD = 5.0nF AND 50Ω, R1, R2 = 200Ω) STV RISING EDGE PROPAGATION DELAY MAX8798 toc19_1 MAX8798 toc19 CPV 5V/div 0V OE 5V/div 0V STV 5V/div 0V STV 5V/div 0V CKV 20V/div 0V STVP 10V/div STVP 10V/div 0V 0V CKVB 20V/div 0V 4μs/div 4μs/div 100ns/div OE/CKV RISING EDGE PROPAGATION DELAY STV FALLING EDGE PROPAGATION DELAY OE/CKV FALLING EDGE PROPAGATION DELAY MAX8798 toc20_1 MAX8798 toc20 MAX8798 toc21 MAX8798 toc21_1 OE 5V/div STV 5V/div OE 5V/div 0V 0V 0V CKV 10V/div 0V CKV 10V/div 100ns/div 0V STVP 10V/div 0V 100ns/div 100ns/div ______________________________________________________________________________________ 11 NBY98:9 _________________________________________________________________________________________________ ࢜ቯᔫᄂቶ)ኚ* (Circuit of Figure 2, VIN = 3V, TA = +25°C, unless otherwise noted.) NBY98:9 ดᒙఎਈࡼcpptuࢯஂLj ૹ߅4ᄰࡸྸහདࣅLj᎖UGU! MDE _________________________________________________________________________________________________ ࢜ቯᔫᄂቶ)ኚ* (Circuit of Figure 2, VIN = 3V, TA = +25°C, unless otherwise noted.) CALIBRATOR SIGNAL LSB DOWNWARD STEP RESPONSE MAX8798 toc22 0V CALIBRATOR SIGNAL LSB UPWARD STEP RESPONSE SCL 5V/div SDA 5mV/div 0V VCOM (AC-COUPLED) 10mV/div 0mV VSET (AC-COUPLED) 10mV/div 0mV MAX8798 toc23 0V VCOM (AC-COUPLED) 10mV/div 0mV VSET (AC-COUPLED) 10mV/div 0mV 40μs/div CALIBRATOR FULL-SCALE UPWARD STEP RESPONSE MAX8798 toc24 0V SDA 5V/div 0V 40μs/div CALIBRATOR FULL-SCALE DOWNWARD STEP RESPONSE SCL 5V/div MAX8798 toc25 SCL 5V/div 0V SDA 5V/div 0V SDA 5V/div 0V 4.025V VCOM 2V/div 2.422V 4.025V VCOM 2V/div 2.422V VSET 200mV/div 0mV 12 VSET 200mV/div 0mV 40μs/div SCL 5V/div 40μs/div ______________________________________________________________________________________ ดᒙఎਈࡼcpptuࢯஂLj ૹ߅4ᄰࡸྸහདࣅLj᎖UGU! MDE ୭ ߂ ถ 1 CKV ኹĂᐜ൴ߡၒ߲ăဧถဟLjᏴඛৈDQWၒྜྷࡼሆଢ଼ዘLjDLWᏴ࢟ຳᓨზ)ೌᒗHPO*ਜ਼ࢅ࢟ຳᓨზ )ೌᒗHPGG*ᒄମᄢܤăᄴဟLjᏴDQWਜ਼PFᆐࢅ࢟ຳDQWᆐࢅ࢟ຳĂPFDPOᆐ࢟ຳဟLjDLWᆐᔜზă 2 CKVCS 3 CKVBCS 4 CKVB ኹĂᐜ൴ߡၒ߲ăᑵޟᔫ໐ମLjDLWCᎧDLWनሤLjࡩDLWᆐᔜზဟLjDLWCጐᆐᔜზă 5 STVP ኹĂဪ൴ߡၒ߲ăࡩTUWᆐࢅဟLjTUWQᆐࢅ)ೌᒗHPGG*ǗஞࡩTUWᆐ݀༦DQWਜ਼PFᆐࢅဟLj TUWQᒙ)ೌᒗHPO*ăࡩTUWᆐLj༦DQWPFᎌጙৈᆐဟLjTUWQᆐᔜზă 6 STV 7 OECON 8 OE ࢟ຳᎌĂᐜ൴ߡၒ߲ဧถăᏴPFဍዘLjDLWਜ਼DLWCᅓ߲ᔜზ࢟ৢᓨზă 9 CPV ޝဟᒩ൴ߡၒྜྷăDQW఼ᒜDLWਜ਼DLWCၒ߲ဟኔLjဧDLWਜ਼DLWCᏴሆଢ଼ዘখܤᓨზ)၅ሌৢ࢟*ă 10 GND ൝࢟വă 11 DISH HPGGह࢟ၒྜྷăEJTIሆ౯ᒗ࢟ᆡጲሆ૮HPGGਜ਼HOEࡼดೌݝLjဧHPGG࢟ᏎኸႥह࢟ăᄰޟLjEJTI ᄰਭ࢟ྏೌᒗJOLjࡩWJOࢬ࢟ဟHPGGह࢟ă 12 VDD ࢟ᏎၒྜྷăWDPNቅᓰࡼ൝࢟ᏎၒྜྷLjᔢቃ1/2μGࡼ࢟ྏവᒗHOEă 13 WPN ࢅ࢟ຳᎌቖۣઐၒྜྷăࡩXQOᆐࢅဟLjJ3DᒎഎLjݙถኀখWDPNቅᓰᒙă 14 SCLS ۸J3DରྏဟᒩၒྜྷăࡩXQOᆐဟLjTDMTೌᒗTDMLjᄰਭ۸ဟᒩᏎདࣅTDMă 15 SCL J3Dରྏဟᒩၒྜྷਜ਼ၒ߲ă 16 SDA J3Dରྏࠈቲၷሶၫሣă 17 WPP ቖۣઐၒ߲ăXQQᎧXQOनሤLjభጲ᎖఼ᒜୈࡼᎌቖۣઐၒྜྷă 18 SET ൸߈ᇢ࢟ഗࢯஂၒྜྷăᄰਭೌᏴTFUᎧHOEᒄମࡼ࢟ᔜSTFUᒙ൸߈ᇢ࢟ഗLjᇢ࢟ഗᆐ WCPPTU 0! )31! y! STFU*ăJPVUࢀ᎖ഗਭSTFUࡼ࢟ഗă 19 VL 4/4Wຢᆮኹၒ߲ăকᆮኹᆐดݝෝผ࢟വ࢟LjྙဍኹࢯஂĂᏥႯहࡍਜ਼WDPNቅᓰă భጲᆐᅪݝঌᏲᄋᔢࡍ21nB࢟ഗLjᄰਭ1/33μGৎࡍࡼჿࠣ࢟ྏവWMᒗHOEă DLW࢟ৢೌăࡩDLWᆐᔜზLjᏤೌᒗDLWCဟLjDLWDTೌᒗDLWLjৢೝৈၒ߲࢟ྏঌᏲࡼ࢟ă DLWC࢟ৢೌăඛࡩDLWCᆐᔜზLjᏤೌᒗDLWဟLjDLWCDTೌᒗDLWCLjৢೝৈၒ߲࢟ྏঌ Ᏺࡼ࢟ă ޝᄴݛၒྜྷăTUWဍዘဵጙᑷၫࡼఎဪLjTUWၒྜྷ᎖ޘညኹTUWQၒ߲ă ࢅ࢟ຳᎌĂၒ߲ဧถࢾဟၒྜྷăPFDPOᎅளਭSD݆ࡼPFၒྜྷቧདࣅLjྙਫPFۣߒ࢟ຳࡼဟମ ᔗ৫ޠLjᄰਭ࢟ᔜ࢟ྏߠ࢟ᒗPFDPOඡሢLjPFቧືۻᒇࡵPFࢅܤ༦࢟ྏ࢟ኹᄰਭ࢟ᔜह࢟ᒗ ඡሢጲሆă ______________________________________________________________________________________ 13 NBY98:9 ```````````````````````````````````````````````````````````````````````````` ୭ႁී NBY98:9 ดᒙఎਈࡼcpptuࢯஂLj ૹ߅4ᄰࡸྸහདࣅLj᎖UGU! MDE ``````````````````````````````````````````````````````````````````````` ୭ႁී)ኚ* ୭ ߂ 20 BGND हࡍ࣡ă 21 BOOST ᏥႯहࡍ࢟ᏎၒྜྷLjೌᒗWNBJO࣡)ᅄ3*Lj݀ᄰਭ2μGৎࡍࡼჿࠣ࢟ྏവᒗCHOEă 22 OUT భࢯᇢ࢟ഗၒ߲ăPVUೌᒗᏥहQPTၒྜྷ)CPPTUਜ਼HOEᒄମ*࣡ࡼ࢟ᔜॊኹLjࢯᑳWDPNၒ߲࢟ኹă JPVUጲభࢯஂࡼ७ࣞଢ଼ࢅॊኹ࢟ኹă 23 POS ᏥႯहࡍᄴሤၒྜྷă 24 NEG ᏥႯहࡍनሤၒྜྷă 25 VCOM ᏥႯहࡍၒ߲ă 26 SHDN ਈ఼ࣥᒜၒྜྷă౯ࢅSHDNਈܕဍኹࢯஂLjWDPNቅᓰĂᏥहਜ਼ྸහདࣅۣߒᎌᔫă 27 IN ဍኹࢯஂ࢟ᏎၒྜྷLjᄰਭ2μGৎࡍࡼჿࠣ࢟ྏവJOᒗBHOE! )45୭*ă 28, 29 LX ఎਈஂ࢛ăࠥ୭ೌ࢟ঢ0औLjኊିቃሣཌᎮࡼෂ૩Ljጲଢ଼ࢅFNJă 30, 31 PGND 32 FB 33 COMP ᇙތहࡍޡݗၒྜྷăDPNQᎧBHOEᒄମೌࠈೊSDLj࢜ቯᒋᆐ291lΩਜ਼581qGă 34 AGND ă 35 GOFF ᐜਈࣥ࢟ᏎăHPGGဵDLWĂDLWCਜ਼TUWQኹདࣅၒ߲ࡼঌ࢟Ꮞ࢟ኹLjݧᔢቃ1/2μGࡼჿࠣ࢟ྏ വᒗQHOEă 36 GON ᐜఎ࢟ᏎăHPOဵDLWĂDLWCਜ਼TUWQኹདࣅၒ߲ࡼᑵ࢟Ꮞ࢟ኹLjݧᔢቃ1/2μGࡼჿࠣ࢟ྏ വᒗWNBJOQHOEă — EP 14 ถ ൈLjೌดݝဍኹࢯஂൈఎਈࡼᏎă नౣၒྜྷLjݬఠ࢟ኹ߂ܪᒋᆐ2/35WLjೌᅪ࢟ݝᔜॊኹࡼᒦମ࢛LjኊିቃሣཌᎮෂ૩Lj োWPVU >! 2/35W! )2! ,! S20S3*ᒙWPVUă ۳ݝൡăᄰਭࣶৈਭೌᒗෝผຳෂLjጲখ࿖ྲེă ______________________________________________________________________________________ ดᒙఎਈࡼcpptuࢯஂLj ૹ߅4ᄰࡸྸහདࣅLj᎖UGU! MDE 0.1μF VP 20V, 20mA 0.1μF 0.1μF NBY98:9 0.1μF VN -12V, 20mA 0.1μF 0.1μF 10Ω 0.1μF 0.1μF 1μF VIN 2.2V TO 3.6V D1 2.6μH 0.1μF 10μF SHDN DISH VN GOFF VP GON 10μF IN LX PGND FB CPV OE SYSTEM 20kΩ R1 200kΩ RCOMP 100kΩ COMP STV CCOMP 220pF OECON VMAIN 8V, 300mA R2 34kΩ AGND 3nF STVP 200Ω CKVCS PANEL MAX8798 BOOST CKVB NEG 200Ω CKVBCS VCOM CKV R3 200kΩ VL VL 0.22μF POS VDD BGND 0.1μF 20kΩ TO VCOM BACKPLANE GND VIN R4 200kΩ OUT 20kΩ SDA SCL 2 I C BUS SCLS WPP WPN SET RSET 25kΩ ᅄ3/! NBY98:9࢜ቯᔫ࢟വ ______________________________________________________________________________________ 15 NBY98:9 ดᒙఎਈࡼcpptuࢯஂLj ૹ߅4ᄰࡸྸහདࣅLj᎖UGU! MDE VN VP VIN 1.8V TO 5.5V VMAIN IN SHDN 250kΩ LX DISH 1.6A min STEP-UP 500Ω CPV OE SYSTEM STV VN FB COMP SCAN DRIVER LOGIC AND GATE DRIVERS OECON PGND AGND GON GOFF VP STVP BOOST CKVCS NEG PANEL CKVB VCOM CKVBCS CKV POS VL VL VL VDD BGND OUT VIN GND 7 2C I INTERFACE DAC SDA I2C BUS SCL SCLS WPP WPN SET ᅄ4/! NBY98:9ถౖᅄ 16 ______________________________________________________________________________________ TO VCOM BACKPLANE ดᒙఎਈࡼcpptuࢯஂLj ૹ߅4ᄰࡸྸහདࣅLj᎖UGU! MDE ``````````````````````````````` ሮᇼႁී NBY98:9࢜ቯᔫ࢟വ)ᅄ3*భᆐUGUመာᄋ,9WᏎ དࣅ࢟Ꮞਜ਼ࡍᏖ,31WĂ.23Wࡼᐜདࣅ࢟ᏎăJDၒྜྷ࢟ ኹपᆍᆐ,2/9Wᒗ,6/6WLjᅄ3ᒦࡼ࢟വଐᔫ᎖3/3Wᒗ 4/7Wăܭ2೫ᅎୀᏄୈLjܭ3೫Ꮔୈ።ࡼೊᇹ ቧᇦă NBY98:9۞ጙവቶถဍኹఎਈࢯஂĂጙവႥᏥ ႯहࡍĂጙവ᎖ᎌᏎᑫUGU! MDEࡼྯᄰࡸኹ࢟ຳ ᓞધྸහདࣅਜ਼ጙৈJ3D఼ᒜࡼWDPNቅᓰăᅄ4߲ ೫NBY98:9ࡼถౖᅄă ဍኹࢯஂ ܭ2/! Ꮔୈܭ DESIGNATION DESCRIPTION C1 10μF, 6.3V X5R ceramic capacitor (1206) TDK C3216X5ROJ106M C21, C22 4.7μF, 10V X5R ceramic capacitors (1206) TDK C3216X5R1A475M D1 D2–D5 L1 3A, 30V Schottky diode (M-flat) Toshiba CMS02 ဍኹࢯஂݧ࢟ഗෝါĂৼࢾຫൈQXNଦ৩Ljဧણവ ࡒᔢࡍLjᆐUGU MDEෂۇᏎདࣅࡼ൴ߡঌᏲᄋ Ⴅၾზሰ።ăఎਈຫൈ)2/3NI{*Ꮴဧቃߛࡁ࢟ঢਜ਼ ჿࠣ࢟ྏLjᄋިۡMDEෂۇଐăૹ߅NPTGFUጲ ૺJDดࡼݝၫᔊྟࣅถି೫఼ᒜ፻࢟ഗჅኊࡼ ᅪݝᏄୈLjᄰਭᅪ࢟ݝᔜॊኹభၒ߲࢟ኹᒙᏴWJO ᒗ29Wă ࢯஂᄰਭࢯᑳดݝൈNPTGFUඛৈఎਈᒲ໐ࡼᐴహ܈ )E*Lj఼ᒜၒ߲࢟ኹਜ਼ൈࡼᓞધLjNPTGFUࡼᐴహ܈ Ꮦᆐǖ 200mA, 100V, dual, ultra-fast diodes (SOT23) Fairchild MMBD4148SE V −V D ≈ MAIN IN VMAIN 3.6μH, 1.8A inductor Sumida CM0611BHPNP-3R6MC ܭ3/! Ꮔୈ። PHONE FAX Fairchild Semiconductor SUPPLIER 408-822-2000 408-822-2102 www.fairchildsemi.com WEBSITE Sumida Corp. 847-545-6700 847-545-6720 www.sumida.com TDK Corp. 847-803-6100 847-390-4405 www.component.tdk.com Toshiba American Electronic Components, Inc. 949-455-2000 949-859-3963 www.toshibaamerica.com/taec ______________________________________________________________________________________ 17 NBY98:9 ``````````````````````````` ࢜ቯᔫ࢟വ NBY98:9 ดᒙఎਈࡼcpptuࢯஂLj ૹ߅4ᄰࡸྸහདࣅLj᎖UGU! MDE ᅄ5߲೫ဍኹࢯஂࡼऱౖᅄăᇙތहࡍGC࣡ቧ Ꭷ2/35Wቲ୷܈LjখܤDPNQၒ߲ăDPNQ࣡ࡼ࢟ኹࢾ ඛࠨดݝNPTGFUఎဟࡼ࢟ഗ߿ख࢛ăႲᓹঌᏲࡼܤછLj ᇙތहࡍሶDPNQၒ߲Ꮞ߲ᇢྜྷ࢟ഗLj࠭ऎޘညঌᏲ Ⴥኊࡼ࢟ঢख़ᒋ࢟ഗăᆐۣߒᐴహ܈ဟࡼᆮࢾቶLjሶ ࢟ഗଶހቧଝྜྷቓൈޡݗቧă ᏴดݝဟᒩࡼဍዘLj఼ᒜ࣪ጙৈ߿खᒙᆡLjࡴᄰo ࡸNPTGFULjၒྜྷ࢟ኹଝࡵ࢟ঢă࢟ঢ࢟ഗሣቶ ဍLjڳถࡀࡵࠟޝᒦăࡩ࢟ഗनౣቧਜ਼ቓൈݗ ޡቧᒄਜ਼ިਭDPNQ࢟ኹဟLj఼ᒜআᆡ߿खLjਈܕ NPTGFUăᎅ᎖࢟ঢ࢟ഗࡼೌኚቶLj࢟ঢೝ࣡ࡼनሶ࢟ኹ ဧऔ)E2*ࡴᄰă࢟ঢೝ࣡ࡼ࢟ኹ߅ܤၒ߲࢟ኹਜ਼ၒ ྜྷ࢟ኹᒄތăᑚৈह࢟ᓨზဧ࢟ঢ࢟ഗᓆ୍ሆଢ଼Lj ࠟޝᒦࡀࡼถࠅࡵၒ߲࢟ྏਜ਼ঌᏲăᏴဟᒩᒲ໐ ࡼထᒲ໐ดLjNPTGFUۣߒਈܕă ་ኹჄࢾ)VWMP* ་ኹჄࢾ)VWMP*࢟വJO࣡ၒྜྷ࢟ኹਜ਼VWMPඡሢ)2/4W ဍਜ਼2/3Wሆଢ଼*ቲ୷܈Ljጲۣᑺၒྜྷ࢟ኹᔗ৫Ljဣ ሚభణᔫă211nW )࢜ቯ*ࡼᒣૄభऴᒏၒྜྷၾܤᒮ ቤࣅăጙࡡၒྜྷ࢟ኹިਭVWMPဍඡሢLjᒮቤఎ ࢟Ꮞăࡩၒྜྷ࢟ኹଢ଼ᒗVWMPሆଢ଼ඡሢጲሆဟLj఼ᒜਈ ܕᓍဍኹࢯஂਜ਼ሣቶᆮኹLjਈࣥఎਈ఼ᒜෝ్LjᏥ Ⴏहࡍၒ߲ܤᆐᔜზă LX CLOCK LOGIC AND DRIVER PGND ILIM COMPARATOR SOFTSTART ILIMIT SLOPE COMP PWM COMPARATOR CURRENT SENSE 1.2MHz OSCILLATOR TO FAULT LOGIC 1.0V FAULT COMPARATOR ERROR AMP FB 1.24V COMP ᅄ5/! ဍኹࢯஂऱౖᅄ 18 ______________________________________________________________________________________ ดᒙఎਈࡼcpptuࢯஂLj ૹ߅4ᄰࡸྸහདࣅLj᎖UGU! MDE ᔈਜ਼ྟࣅ NBY98:9ݧᔈᔫෝါăᏴᑵޟᔫ༽ౚሆLjดݝ ሣቶᆮኹᆐด࢟ݝവ࢟ăሣቶᆮኹࡼၒྜྷ)CPPTU* ።ࡩᒇೌᒗဍኹࢯஂࡼၒ߲ăࡩJOਜ਼CPPTU࣡࢟ኹ ᎖VWMPඡሢLj݀༦ᎌ߿ख৺ᑇჄࢾဟLjNBY98:9 ࣅăఎઁLjࢯஂᔫᏴఎણఎਈᓨზLjޘညሣቶ ᆮኹࡼ࢟࢟ኹăࡩWM࢟ኹ᎖3/8W )࢜ቯᒋ*ဟLjด ݝᓰෝ్ఎăᓰ࢟ኹࡉࡵᆮኹᓨზဟLjQXN఼ᒜ ਜ਼ሢഗ࢟വဧถLjဍኹࢯஂྜྷྟࣅăྟࣅ໐ ମLjᓍဍኹࢯஂᒇሢᒜ࢟ঢ࢟ഗख़ᒋLj࠭ഃᒗᔢࡍ ሢഗඡሢᎌ239ৈሤࢀࡼ࢟ഗݛࢀăၒ߲࢟ኹᆮࢾ )ᒫᒏྟࣅ*ઁLjྟࣅࢾဟިဟ)த4nt*ઁLjభᄋ ᔢࡍঌᏲ࢟ഗăྟࣅਭ߈፻࢟ഗਜ਼࢟ኹਭߡଢ଼ᒗ ᔢࢅLjۣ݀ᑺ೫ᑵཀྵࡼ࢟ၿኔă ৺ᑇۣઐ ᆮࢾᔫ໐ମLjNBY98:9ପހGC࢟ኹăྙਫGC࢟ኹިݙ ਭ2W )࢜ቯ*LjNBY98:9ࣅดݝ৺ᑇଐဟăྙਫᏴ৺ ᑇଐဟ໐ମ߲ሚೌኚ৺ᑇLjNBY98:9߿ख৺ᑇܕჄLj ਈܕᓍဍኹࢯஂਜ਼ሣቶᆮኹLjਈܕఎਈ఼ᒜෝ్ਜ਼ ᏥႯहࡍăጙࡡ৺ᑇᓨზሿပLjၒྜྷ࢟ኹᒮቤ࢟ጲ ༹߹৺ᑇܕჄLjᒮቤࣅୈăᏴྟࣅ໐ମLj৺ᑇଶ ࢟ހവਈܕă NBY98:9ପހCPPTUࡼ་ኹਜ਼ਭኹᓨზăྙਫCPPTU࢟ ኹࢅ᎖2/5W )࢜ቯ*᎖2:W )࢜ቯ*LjNBY98:9ਈܕဍኹ ࢯஂࡼᐜདࣅLjᄫᒏดݝNPTGFUఎਈᔫă CPPTU་ኹਜ਼ਭኹᓨზሆ߿્ݙख৺ᑇܕჄă ᏥႯहࡍ NBY98:9ᎌጙৈᏥႯहࡍLjᄰޟ᎖དࣅMDE۳ۇ )WDPN*ᖔ൨ኀᑵॊኹࠈăᏥႯहࡍᄋ±261nB വၒ߲࢟ഗĂ51W0μtڼൈਜ਼31NI{ࡒăႰᏥहଐᆐ ൸ڼ७ၒྜྷĂၒ߲Ljၒྜྷ࢟ኹࡉࡵ࢟Ꮞڼ७)CPPTUਜ਼ CHOE* 2WጲดဟLjறࣞࡍࡍଢ଼ࢅă വ࢟ഗሢᒜ ྙਫၒ߲ᒇࡵCPPTUBHOELjᏥहၒ߲࢟ഗሢ ᒜᏴࡍᏖ±261nBăྙਫവ༽ౚߒኚखညLjJDஉᆨᓆ ୍ဍLjᔢᒫࡉࡵེਈࣥඡሢ)࢜ቯ,271°D*ăጙࡡஉᆨࡉ ࡵེਈࣥඡሢLjดݝᆨࣞࠅঢኸႥ߿खེ৺ᑇܕჄLj ਈܕᓍဍኹࢯஂĂሣቶᆮኹĂఎਈ఼ᒜෝ్ਜ਼ᏥႯ हࡍăၒྜྷ࢟ኹᒮጲ༄Ljୈࡼᑚቋ࢟വۣߒਈ ܕᓨზă དࣅ࠙ྏቶঌᏲ ᏥႯहࡍᄰޟ᎖དࣅMDE۳)ۇWDPN*ᖔ൨ኀᑵॊ ኹࠈăMDE۳ࡀۇᏴ୷ࡍࡼॊྏ࢟ݚਜ਼࢟ᔜLjকᏥႯह ࡍభጲ੪ྏጵདࣅᑚቋঌᏲăऎLjྙਫᏥႯहࡍ Ᏼ።ᒦ᎖དࣅ࠙ྏቶঌᏲLjܘኍݧནሆݛᒾጲ ۣᑺᆮࢾᔫă ႲᓹᏥႯहࡍྏቶঌᏲᐐࡍLjहࡍࡼࡒଢ଼ࢅLjᐐ ፄख़ᒋᄋăWDPNਜ਼ྏቶঌᏲᒄମࡼ6Ωᒗ61Ωቃ࢟ᔜభ ଢ଼ࢅख़છLjࡣᄴဟᐐፄጐଢ଼ࢅăଢ଼ࢅख़ᒋభጲݧࠈೊ SDᆀ)દߡ*ᎧྏቶঌᏲ݀ೊăSDᆀߒ્ݙኚଝᏲ ၒ߲ଢ଼ࢅᐐፄă࢟ᔜࡼ࢜ቯᒋᏴ211Ωਜ਼311ΩᒄମLj࢟ ྏ࢜ቯᒋᆐ21qGă ______________________________________________________________________________________ 19 NBY98:9 ሣቶᆮኹ)WM* NBY98:9۞ጙৈ4/4WሣቶᆮኹLjCPPTUᆐሣቶᆮኹ ࡼၒྜྷăၒྜྷ࢟ኹपᆍ6Wᒗ29WăকᆮኹᆐჅᎌดݝ ࢟വ࢟Lj۞౪NPTGFUᐜདࣅăဧ1/33μGৎࡍ ࡼჿࠣ࢟ྏWMവᒗBHOEăCPPTU።ᒇೌᒗဍ ኹࢯஂࡼၒ߲Ljᑚጙᄂቶࡍࡍࡼᄋ೫ࢅၒྜྷ࢟ኹဟ ࡼൈă NBY98:9 ดᒙఎਈࡼcpptuࢯஂLj ૹ߅4ᄰࡸྸහདࣅLj᎖UGU! MDE CKV CPV SYSTEM VIDEO TIMING OE CKVB MAX8798 SCAN DRIVER STV STVP HIGH-VOLTAGE SHIFT REGISTER COLUMN DRIVER PANEL GLASS CKV = SCAN CLK ODD CKVB = SCAN CLK EVEN STVP = HIGH-VOLTAGE STV ᅄ6/! ྸහདࣅᇹᄻౖᅄ ኹ࢟ຳᓞધྸහདࣅ NBY98:9۞4ᄰࡸኹ)71W*࢟ຳᓞધྸහདࣅLj۞ ෂ݁ۇೇቲདࣅถჅኊࡼჅᎌ൝ถ)ᅄ6*ăད ࣅၒ߲)DLWĂDLWCĂTUWQ*োকෝ్ࡼၒྜྷ)TUWĂ DQWĂPFਜ਼PFDPO*ਜ਼ดݝ൝)ܭ4Ă5*LjᏴ࢟Ꮞ࢟ኹ ܭ4/! TUWQ൝ SIGNAL LOGIC STATE STV H H H L OECON X X X X CPV L H X X OE L X H X STVP H Hi-Z Hi-Z L )HPOਜ਼HPGG*ᒄମࣅڼăTUWᆐޝᄴݛቧăDQWᆐቲᄴ ݛቧăPFᆐၒ߲ဧถቧăPFDPOᆐᔈPFቧࡼࢾ ဟቧLjྙਫPFۣߒᏴ࢟ຳࡼဟମਭޠLjືPFă ᑚቋቧᎌࡼDNPTၒྜྷ൝࢟ኹᎅJO࢟Ꮞ࢟ኹᒙă DLWਜ਼DLWCᆐઑྸࡼݗහဟᒩၒ߲ăTUWQᆐၒ߲ྸහ ဪቧăᑚቋၒ߲ቧᏴHPOਜ਼HPGGᒄମࣅڼLjᔢࡍप ᆍ,56Wਜ਼.36Wăᑚቋၒ߲ᎌ21Ω )࢜ቯ*ၒ߲ᔜఝLjభኸ ႥདࣅྏቶঌᏲăઑࡼݗDLWਜ਼DLWCၒ߲ᄋဏ࢟Ă࢟ ৢၒྜྷ)DLWDTĂDLWCDT*LjᏴܤધ໐ମඛവၒ ߲ᒗॺᓐ࣡ాLjጲஂဏLjဣሚĐᇄႼđᓞધă Y! >! ᇄਈă ܭ5/! DLWĂDLWC൝ SIGNAL LOGIC STATE STV H H H L L L L L OECON X X X L L L H H CPV L H X L — X L — OE L X H L X — X X CKV L H H CS Toggle Toggle CS Toggle CKVB H L L CS Toggle Toggle CS Toggle Y! >! ᇄਈĂDT! >! ࢟ৢᓨზă 20 ______________________________________________________________________________________ ดᒙఎਈࡼcpptuࢯஂLj ૹ߅4ᄰࡸྸහདࣅLj᎖UGU! MDE ࢟ᔜॊኹਜ਼CPPTU࢟ᏎᒙWDPNࡼᔢࡍᒋăPVU࠭ॊ ኹᇢ၃࢟ഗLjଢ଼ࢅQPT࢟ኹਜ਼WDPNၒ߲ăTFU࣡ࡼᅪ ࢟ݝᔜ)STFU*ᒙ൸߈ᇢ࢟ഗਜ਼WDPNᔢቃᒋă EJTIၒྜྷ఼ᒜHPGGਜ਼HOEᒄମࡼఎਈăࡩEJTI౯ᒗᒗ ࢅ᎖࢟ຳ2WဟLjHPGGሶHOEह࢟ăᄰޟLjEJTIᄰਭ࢟ ྏẮᒗJOLjࡩJOᅃࢰൢLjHPGGह࢟Ljဧመာመာ హ)ڹᅄ4*ă HPOၒྜྷᄋ೫߈ܠFFQSPNჅኊࡼኹăቲ߈ܠဟLj WHPOೌᒗUGU MDEࡼWHPO࢟ᏎăWHPO።ࡩ᎖27/2Wᒗ 46WăࡩWHPOቃ᎖26/6W )࢜ቯ*ဟLjணᒏFFQSPN߈ܠăᄰ ਭ1/2μGৎࡍࡼ࢟ྏവWHPOᒗQHOECPPTU )ጯവ ᒗQHOE*ă WDPNቅᓰ WDPNቅᓰభጲభణࡔᄐ૦࢟ᆡࢯஂUGU MDEመ ာࡼMDE۳࢟ۇኹ)WDPN*ăPVUᏴQPT࢛ೌᒗᅪݝ ࢟ᔜॊኹLjభࢯஂᇢ࢟ഗ)J PVU*LjऎᒙWDPN࢟ຳ )ᅄ7*ăดݝ8ᆡEBD఼ᒜᇢ࢟ഗLjᏤઓᐐࡍିቃ WDPN࢟ຳăEBDᎧWCPPTU߅ᑵ܈ਈᇹLj݀Ᏼྀੜᔫᄟ ୈሆۣᑺࢯăઓభEBDᒙࡀᏴดݝFFQSPNă ࢟ဟLjFFQSPNᎾሌᒙEBDᒗᔢቤࡀࡼᒙăᇹᄻ ఼ᒜਜ਼࢟߈ܠവᒄମࡼ3ሣါJ3DాࢯஂEBDLj݀༦ࡩ XQOᆐဟభ߈ܠFFQSPNă ེਭᏲۣઐ ེਭᏲۣઐऴᒏୈਭࡍဟࡴᒘୈਭེăࡩஉᆨ ިਭUK > ,271°DLjᆨࣞࠅঢኸႥࣅ৺ᑇۣઐLjਈࣥဍ ኹࢯஂĂఎਈ఼ᒜෝ్ĂᏥႯहࡍਜ਼ดݝሣቶᆮኹ Ljဧୈದསăጙࡡୈᆨࣞଢ଼ࢅ26°DᔧᎎLjၒྜྷ࢟ ኹ)ࢅ᎖VWMPሆଢ଼ඡሢ*ᒮቤࣅLj༹߹৺ᑇჄࡀ݀ᒮ ୈă ৺ᑇᓨზሆLjེਭᏲପހభᎌۣઐ఼ᒜăᆐۣᑺೌ ኚᔫLjݙገިਭऄࢾᔢࡍஉᆨUK > ,261°Dă VDD VDD VMAIN VDD BOOST LINEAR REGULATOR NEG 19R SDA SCL WPN VCOM I2C CONTROL INTERFACE DAC R R3 7 I2C BUS VCOM POS OUT SCLS WPP 7 R4 EEPROM BLOCK SET GON RSET VGON ᅄ7/! WDPNቅᓰถౖᅄ ______________________________________________________________________________________ 21 NBY98:9 HPGGႥह࢟ถ)EJTIၒྜྷ* NBY98:9 ดᒙఎਈࡼcpptuࢯஂLj ૹ߅4ᄰࡸྸහདࣅLj᎖UGU! MDE ``````````````````````````````` ଐݛᒾ ᓍဍኹࢯஂ ࢟ঢኡᐋ Ᏼኡᐋ࢟ঢဟLjኊገఠᔢቃ࢟ঢᒋĂऄࢾख़ᒋ࢟ഗጲ ૺࠈೊ࢟ᔜࢀᓄࣶፐႤăᑚቋፐႤ፬ሰᓞધࡼൈĂ ᔢࡍၒ߲ঌᏲถೆĂၾზሰ።ဟମጲૺၒ߲࢟ኹᆬ݆ă ࠥᅪLjથኊገఠᇕಯߛࡁਜ਼߅۾ă ᔢࡍၒ߲࢟ഗĂၒྜྷ࢟ኹĂၒ߲࢟ኹਜ਼ఎਈຫൈࢾ೫ ࢟ঢᒋࡼࡍቃăࡍࡼ࢟ঢభି࢟ഗᆬ݆Lj࠭ऎଢ଼ࢅ೫ ख़ᒋ࢟ഗLjᑚభጲଢ଼ࢅ࢟ঢดࡼࠟበႼጲૺᑳৈൈ ᄰവࡼJ3SႼăऎLjࡍ࢟ঢᒋፀᆜᓹኊገৎࣶࡼ࢟ঢ ถਜ਼ৎࣶࡼሣམᏫၫLjᑚ્ᐐࡍᇕಯߛࡁ݀ᐐଝ࢟ঢ ดࡼJ3SႼăቃࡼ࢟ঢᒋᐌభିቃᇕಯߛࡁLjࡣ࢟ഗᆬ ݆ਜ਼ख़ᒋ࢟ഗ્ᐐࡍăፐࠥኊገᏴ࢟വൈĂ࢟ঢߛࡁ ਜ਼߅۾ᒄମཚੰఠLjኡནᔢଛࡼ࢟ঢᒋă ࠥࠀ߲ࡼါᒦᎌጙৈޟMJSLjဵ൸Ᏺ࢟ഗဟLj ࢟ঢᆬ݆࢟ഗࡼख़.ख़ᒋᎧຳᒇഗ࢟ঢ࢟ഗᒄ܈ăဍኹ ࢯஂ࢟ঢߛࡁਜ਼࢟വൈᒄମࡼᔢଛຳੰ࢛ဧMJSᄰޟ Ᏼ1/4ਜ਼1/6ᒄମăݙਭLjఠࡵ࢟ঢࠟበݢ೯ࡼୣഗᄂቶLj ጲૺ࢟ঢ࢟ᔜᎧൈᄰവࡼჇ࢟ᔜࡼ܈ᒋLjᔢଛMJS ᒋ્ሆܤછăྙਫ࢟ঢ࢟ᔜሤ࣪୷Ljభးࡩᐐࡍᆬ ݆LjጲିቃჅኊࡼሣམᏫၫĂᐐଝሣམᒇăྙਫ࢟ঢ ࢟ᔜມቃLjᐌᐐࡍ࢟ঢጲଢ଼ࢅख़ᒋ࢟ഗLjభଢ଼ࢅᑳৈ ൈᄰവࡼႼăྙਫݧऻࡼۡޟᔜᒋ࢟ঢLjስ MDEෂۇ።ᒦกዹLjᔢଛMJSభถᐐଝࡵ1/6ᒗ2/1ᒄମă ጙࡡኡᐋੑ࢟ঢࡼߛࡁLj።ࡩᏴ࢜ቯᔫཌᎮดຶৰᐐ ࡍଢ଼ࢅ࢟ঢᒋဟൈᄋဍᓨౚă Ᏼᅄ3ᒦLjMDEࡼᐜࡴᄰ࢟ኹਜ਼ᐜਈࣥ࢟ኹဵᎅೝৈ ऻᆮኹቯ࢟)܃ᎅဍኹࢯஂࡼMYஂ࢛དࣅ*ޘညࡼăፐ ࠥLjᏴଐႯ࢟ঢਜ਼࢟ഗဟገఠࡵMYࡼऄᅪঌᏲăᎌ ࡼᔢࡍၒ߲࢟ഗJNBJO)FGG*ࢀ᎖ဍኹࢯஂၒ߲ᔢࡍঌᏲ ࢟ഗਜ਼ᑵĂঌ࢟࢟܃ഗᒄਜ਼ǖ IMAIN(EFF) = IMAIN(MAX) + nNEG × INEG + (nPOS + 1) × IPOS ᒦJNBJO)NBY*ဵဍኹၒ߲࢟ഗࡼᔢࡍᒋLjoOFHဵঌኹ࢟ ܃ၫLjoQPTဵᑵኹ࢟܃ၫLjJOFHဵঌኹ࢟ࡼ܃ၒ ߲࢟ഗLjJ QPTဵᑵኹ࢟ࡼ܃ၒ߲࢟ഗLjଣJ QPTࡼ࢟ ࢟܃ᏎᆐWNBJOă ݧ࢜ቯၒྜྷ࢟ኹ)WJO*Ăᔢࡍၒ߲࢟ഗ)JNBJO)FGG**Lj݀ো ࢜ቯᔫᄂቶᒦᎌਈཎሣჅᄋࡼ໐ᆃൈ)ηUZQ*Ljጲ ૺোၤᄀ൙ᒦৰଐࡼMJSଐႯ߲းࡩࡼ࢟ঢǖ 2 ⎛ V ⎞ ⎛ VMAIN − VIN ⎞ ⎛ ηTYP ⎞ L = ⎜ IN ⎟ ⎜ ⎜ ⎟ ⎝ VMAIN ⎠ ⎝ IMAIN(EFF) × fOSC ⎟⎠ ⎝ LIR ⎠ Ᏼးࡩࡼ࢟ঢᇹᒦኡᐋጙৈܪᓰ࢟ঢᒋăᏴᔢቃၒྜྷ ࢟ኹW JO)NJO*ሆLjোถ၆ੱࢾേጲૺ ࢜ቯᔫᄂቶ ᒦ ᎌਈཎሣჅᄋࡼᄂࢾᔫ࢛ሆࡼ໐ᆃൈ)ηNJO*LjଐႯ ᔢࡍၒྜྷᒇഗ࢟ഗǖ IIN(DCMAX , )= IMAIN(EFF) × VMAIN VIN(MIN) × ηMIN ଐႯকᔫ࢛ࡼᆬ݆࢟ഗጲૺ࢟ঢख़ᒋ࢟ഗǖ IRIPPLE = VIN(MIN) × (VMAIN − VIN(MIN) ) L × VMAIN × fOSC IRIPPLE IPEAK = IIN(DCMAX , )+ 2 ࢟ঢऄࢾۥਜ਼࢟ഗਜ਼NBY98:9ࡼMYሢഗ)J MJN *።ࡍ᎖ JQFBLLj࢟ঢࡼऄࢾᒇഗ࢟ഗ።ࡍ᎖J JO)ED-NBY*ăᆐဣሚ୷ ࡼൈLj።ኡࠈೊ࢟ᔜቃ᎖1/2Ωࡼ࢟ঢă ࣪᎖ᅄ3LjᏴ9Wၒ߲࢟ኹਜ਼4/4W࢜ቯၒྜྷ࢟ኹሆဍኹࢯஂ ࡼᔢࡍঌᏲ࢟ഗ)JNBJO)NBY**ᆐ411nBăࢀࡼ൸Ᏺဍኹ ࢟ഗᆐǖ IMAIN(EFF) = 300mA + 2 × 20mA + (2 + 1) × 20mA = 400mA 22 ______________________________________________________________________________________ ดᒙఎਈࡼcpptuࢯஂLj ૹ߅4ᄰࡸྸහདࣅLj᎖UGU! MDE 2 ⎛ 3.3V ⎞ ⎛ 8V − 3.3V ⎞ ⎛ 0.85 ⎞ L=⎜ ⎟ ⎜ ⎟⎜ ⎟ ≈ 2.8μH ⎝ 8V ⎠ ⎝ 0.4A × 1.2MHz ⎠ ⎝ 0.5 ⎠ ኡᐋ3/7μI࢟ঢăಽ࢟വࡼᔢቃၒྜྷ࢟ኹ)4W*ਜ਼ࠥᔫ ࢛ৰଐࡼ91&ࡼൈǖ IIN(DCMAX , )= 0.4A × 8V ≈ 1.33A 3V × 0.8 কၒྜྷ࢟ኹሆࡼᆬ݆࢟ഗਜ਼ख़ᒋ࢟ഗᆐǖ IRIPPLE = 3V × (8V − 3V ) 2.6μH × 8V × 1.2MHz IPEAK = 1.33A + ≈ 0.6A 0.6A = 1.53A 2 ၒ߲࢟ྏኡᐋ ᔐၒ߲࢟ኹᆬ݆ᎅೝݝॊᔝ߅ǖၒ߲࢟ྏߠह࢟ᐆ߅ࡼ ྏቶᆬ݆ਜ਼ᎅ࢟ྏࢀࠈೊ࢟ᔜ)FTS*ᐆ߅ࡼ๏ᆬ݆ǖ VRIPPLE = VRIPPLE(C) + VRIPPLE(ESR) I ⎛V −V ⎞ VRIPPLE(C) ≈ MAIN ⎜ MAIN IN ⎟ COUT ⎝ VMAINfOSC ⎠ ਜ਼ǖ VRIPPLE(ESR) ≈ IPEAKRESR(COUT) ᒦJQFBLဵख़ᒋ࢟ঢ࢟ഗ)ݬ࢟ঢኡᐋݝॊ*ă࣪᎖ჿࠣ ࢟ྏLjၒ߲࢟ኹᆬ݆ጙۅᓍገᆐWSJQQMF)D*ăᄴဟથ።ఠ ၒ߲࢟ྏࡼऄࢾ࢟ኹਜ਼ᆨࣞᄂቶă ၒྜྷ࢟ྏኡᐋ ၒྜྷ࢟ྏ)D JO*ଢ଼ࢅ࠭ၒྜྷ࢟Ꮞᇢ၃ࡼ࢟ഗବख़Ljଢ଼ ࢅᓖྜྷJDࡼᐅဉăᏴ࢜ቯဣዩ၀ᄟୈሆLjᎅ᎖Ꮞᔜఝ୷ ࡍLjፐࠥᅄ3ᒦݧጙৈ21μGჿࠣ࢟ྏăᏴဣଔ።ᒦLj ᎅ᎖ဍኹࢯஂᄰޟᒇᏴጙৈᆮኹ࢟Ꮞࡼၒ߲Lj ፐࠥᏎᔜఝገࢅࡻࣶăᄰޟLjDJOభጲࢅ᎖ᅄ3ᒦ ߲ࡼᒋăဧးࡩࡼDJOۣᑺJO࣡࢟ᏎࢅᐅဉăྙਫJOᄰ ਭSDࢅᄰ݆)ݬఠᅄ3*࣪D JOቲབྷẮLjD JOభጲߌ၊ ৎࡍࡼ࢟ኹܤછă ᑳഗऔ NBY98:9ࡼఎਈຫൈኊገႥᑳഗăᎅ᎖ቆᄂऔ ᎌ୷ࡼૂআဟମጲૺ୷ࢅࡼᑵሶ࢟ኹLjፐࠥᏴ ࡍࣶၫ።ᒦᅎୀဧᑚᒬऔăᄰޟLj3Bቆᄂऔ భጲ੪ੑดݝNPTGFUă ၒ߲࢟ኹࡼኡᐋ ᓍဍኹࢯஂࡼၒ߲࢟ኹభᄰਭၒ߲࣡)WNBJO*ਜ਼BHOEମ ࡼ࢟ᔜॊኹࢯஂLjᒦቦߥᄿೌᒗGC )ݬᅄ3*ă Ᏼ21lΩᒗ61lΩᒄମኡᐋS3ăݧሆါଐႯS2ǖ ⎞ ⎛V R1 = R2 × ⎜ MAIN − 1⎟ ⎠ ⎝ VREF ᒦLjWSFG )ဍኹࢯஂࡼनౣᒙ࢛*ᆐ2/346W )࢜ቯᒋ*ă ።S2ਜ਼S3ణதJDहᒙă ણവޡݗ ኡᐋS DPNQᒙ૩ॊࡼຫᐐፄLjᄋႥၾზሰ።ă DDPNQᒙ૩ॊ࢟വഃ࢛Ljጲۣߒણവࡼᆮࢾă ࣪᎖FTS୷ቃࡼၒ߲࢟ྏLjభݧጲሆါࡻᆮࢾࡼ ቶถਜ਼୷ੑࡼၾზሰ።ǖ RCOMP ≈ 1000 × VIN × VOUT × COUT L × IMAIN(MAX) CCOMP ≈ VOUT × COUT 10 × IMAIN(MAX) × RCOMP ྦሯࡻৎੑࡼၾზሰ።Ljభጲ31&ࡼ७ࣞখܤS DPNQ Lj ጲ61&ࡼ७ࣞখܤDDPNQLjᄴဟᓖፀފၾზሰ።݆ተă ______________________________________________________________________________________ 23 NBY98:9 MJSན1/6Lj݀ৰଐࠥᔫ࢛ሆࡼൈᆐ96&ǖ NBY98:9 ดᒙఎਈࡼcpptuࢯஂLj ૹ߅4ᄰࡸྸහདࣅLj᎖UGU! MDE ᒙWDPNࢯஂपᆍ ᅪ࢟ݝᔜॊኹᒙWDPNࢯஂपᆍࡼᔢࡍᒋăSTFUᒙ ൸߈ᇢ၃࢟ഗJPVULjক࢟ഗࢾWDPNࢯஂपᆍࡼᔢቃ ᒋăࡍࡼS TFUᒋᐐଝॊܦൈLjࡣିቃWDPNࡼࢯஂपᆍă ᄰਭሆݛᒾଐႯS4ĂS5ਜ਼STFUǖ 2* ኡᐋᔢࡍWDPN࢟ຳ)WNBY*LjᔢቃWDPN࢟ຳ)WNJO*ਜ਼ WNBJO࢟Ꮞ࢟ኹă 3* োೌᒗCPPTUࡼW NBJO࢟Ꮞࡼభ၊࢟Ꮞ࢟ኹ ኡᐋS4Ljपᆍ᎖21lΩᒗ611lΩă 4* ଐႯS5ǖ R4 ≅ VMAX × R3 20 × (VMAX − VMIN ) 6* ཀྵཱྀJTFUᆚިਭ231μBǖ ISET = VBOOST 20 × RSET 7* ྙਫJTFUࡍ᎖231μBLjᒮቤૄࡵݛᒾ3Ljኡᐋࡍጙቋࡼ S2ă 8* ᔢᒫࡼॊܦൈᆐǖ ྙኊ೫ஊখ࿖ེᄂቶࡼৎࣶሮᇼቧᇦLj༿षᆰxxx/nbyjn. jd/dpn/do0uifsnbm.uvupsjbmă ᏥႯहࡍ ᏥႯहࡍࡼན᎖ၒ߲࢟ഗĂၒ߲࢟ኹਜ਼࢟Ꮞ ࢟ኹǖ PDSOURCE = IVCOM _ SOURCE × (VBOOST − VVCOM ) PDSINK = IVCOM _ SINK × VVCOM (VMAX − VMIN ) 127 ᒦLjJWDPN`TPVSDFᆐᏥႯहࡍࡼᏎ߲࢟ഗLjJWDPN`TJOLᆐ ᏥႯहࡍࡼᇢྜྷ࢟ഗă ሆܟ߲೫ᅲᑳࡼଐǖ WNBY >! 5WLjWNJO >! 3/5WLjWCPPTU >! 9W ྙਫS4 > 311lΩLjᐌS5 > 311lΩLjSTFU > 35/:lΩă ॊܦൈǖ23/6nW ``````````````````````````````` ።ቧᇦ JDถ৫ྲࡼᔢࡍൈན᎖በࡵᒲᆍણஹࡼེᔜਜ਼ ણஹᆨࣞăེᔜན᎖JDॖᓤĂQDCᄵཌᎮĂჇེᏎ ਜ਼ഗă 24 NBY98:9ࡼຢดᔢࡍ߲ሚᏴဍኹఎਈĂWDPNहࡍ ጲૺኹྸහདࣅࡼၒ߲ă ဍኹࢯஂ ဍኹࢯஂࡼᓍገဵᎅดݝNPTGFUĂ࢟ঢਜ਼ၒ߲औ ޘညࡼăྙਫဍኹࢯஂᎌ4/4Wၒྜྷਜ਼411nBၒ߲Lj ጲૺ96&ᔧᎎࡼൈLjᐌࡍগᎌ6&ࡼൈሿᏴดݝ NPTGFULj4&ሿᏴ࢟ঢLj6&ᔧᎎࡼൈሿᏴၒ߲ औăჇሿᏴၒྜྷਜ਼ၒ߲࢟ྏጲૺQDC ᔓሣăྙਫၒྜྷൈᆐ4XᔧᎎLjดݝNPTGFUࡼ ᆐ261nXᔧᎎă VMAX × R3 (VBOOST - VMAX ) 5* ଐႯSTFUǖ RSET = NBY98:9ᎌ۳ݝൡLjᒗ2jo3ࡼQDCᄵਜ਼ࡍෂ ૩ดށݝLjభጲሶ,81°DࡼஸზహྲᏖ3/29Xེă ৎࣶࡼQDCᄵĂৎࢅࡼણஹᆨࣞਜ਼ৎ༓ࡼഗᎌᓐ᎖খ ࿖ྲེăৎቃࡼᄵ୷ࡼણஹᆨ્ࣞଢ଼ࢅJDࡼྲེ ถೆăୈࡼᓍገᆐဍኹࢯஂࡼਜ਼ᏥႯहࡍ ࡼă ࢜ቯ༽ౚሆLj࢟Ꮞ࢟ኹᆐ9WLjၒ߲࢟ኹᆐ5WLjᏎ߲࢟ഗ ᆐ41nBLjᆐ231nXă ྸහདࣅၒ߲ ྸහདࣅࡼၒ߲)DLWĂDLWCਜ਼TUWQ*ན᎖ྸහ ຫൈĂྏቶঌᏲਜ਼HPOĂHPGG࢟Ꮞ࢟ኹᒄތǖ PDSCAN = 3 × fSCAN × CPANEL × ( VGON − VGOFF ) 2 ྙਫྸහຫൈᆐ61lI{Ljྯവၒ߲ࡼঌᏲᆐ6oGLj࢟Ꮞ࢟ ኹތᆐ41WLjᐌᆐ786nXă ______________________________________________________________________________________ ดᒙఎਈࡼcpptuࢯஂLj ૹ߅4ᄰࡸྸහདࣅLj᎖UGU! MDE ሣࠈቲా)୭TDMਜ਼TEB*భೌᒗ2/9Wࡵ5WࡼJ 3 Dᔐ ሣăᄰਭ౯࢟ᔜॊܰTDMਜ਼TEBሣ౯ᒗW EE ࢟Ꮞă ᎅሆါଐႯჅኊࡼ౯࢟ᔜǖ RPULLUP ≤ tR CBUS ᒦLjuSဵFmfdusjdbm DibsbdufsjtujdtܭᒦࡼဍဟମLjDCVT ဵᔐሣࡼᔐ࢟ྏă NBY98:9ݧऻܪᓰJ3DాፇLj९ࡍࣶၫܪᓰ࢟ኹ ਜ਼ဟኔݬၫLjݬሆጙݝॊࡼࢾፃă ᔐሣహሔ ၫሣਜ਼ဟᒩሣۣߒ࢟ຳăᒑᎌᏴᔐሣహሔဟLjݣ ถࣅၫࠅၒ)ᅄ8*ă TUBSUᄟୈ)T* ࠭ᔐሣహሔᓨზఎဪ)TEBਜ਼TDMᆐ*Ljဟᒩ)TDM*ᆐ ဟLjTEBᎅ)IJHI*ࡵࢅ)MPX*ࡼᄢޘܤညጙৈఎဪ )TUBSU*ᄟୈăჅᎌෘഎܘኍሌᎅᔐሣࡼᓍ૦ख႙TUBSU ᄟୈఎဪă TUPQᄟୈ)Q* ဟᒩ)TDM*ᆐဟLjTEBᎅࢅࡵࡼᄢޘܤညጙৈᄫᒏ )TUPQ*ᄟୈăჅᎌෘഎܘኍᎅᔐሣࡼᓍ૦ख႙TUPQᄟ ୈஉၦă ၫᎌቶ TUBSUᄟୈઁLjྙਫဟᒩቧᆐ࢟ຳ໐ମၫሣۣߒ ܤݙLjၫሣᓨზჅࡔࡼܭၫۻཀྵཱྀᎌăሣࡼၫ ᒑถᏴဟᒩቧᆐࢅ࢟ຳ໐ମখܤăቖݷᔫ໐ମLjᓍ ૦ᆐၫࡼඛጙᆡޘညጙৈဟᒩ൴ߡLjࣗݷᔫ໐ମLj࠭ ૦Ᏼඛৈဟᒩ൴ߡၒ߲ጙৈၫᆡăඛࠨၫࠅၒ࠭ TUBSUᄟୈఎဪLjᎅTUPQᄟୈஉၦăᏴTUBSUᄟୈਜ਼ TUPQᄟୈᒄମࠅၒೝৈᔊஂă ࠭ᒍ ख႙TUBSUᄟୈઁLjᔐሣᓍ૦ሶNBY98:9ख႙۞8ᆡ ୈࡔ൩)1c2112221:Fi*ࡼ࠭ᒍ)ᅄ9*ăࣗݷᔫဟ9ᆡᆐ 2Ljቖݷᔫဟ9ᆡᆐ1ăNBY98:9ೌኚପހᔐሣ࣪።ࡼ ࠭ᒍăྙਫ၃ࡵ࣪።ࡼ࠭ᒍLj݀༦ᎌᏴFFQSPNܠ ߈ᓨზLjୈޘညጙৈ።ࡊᆡă SDA SCL S BUS FREE DATA LINE STABLE DATA VALID START CONDITION P CHANGE OF DATA ALLOWED STOP CONDITION BUS FREE ᅄ8/! 23DᔐሣTUBSUĂTUPQᄟୈਜ਼ၫখܤᄟୈ S T A R T SLAVE ADDRESS 1001111 R/W A C K DATA BYTE D6 D5 D4 D3 D2 D1 D0 P R O G A C K S T O P READ BYTE: R/W = 1, MAX8798 OUTPUTS D6–D0 FOLLOWED BY PROG = 0 WRITE BYTE: R/W = 2, DATA = D6–D0, PROG = 1 PROGRAM EEPROM: R/W = 0, D6–D0 = DON'T CARE, PROG = 0 ᅄ9/! 23D࠭ᒍਜ਼ၫᔊஂ ______________________________________________________________________________________ 25 NBY98:9 WDPNቅᓰా NBY98:9ဵጙ࠭ୈLjJ3Dᒍᆐ:Fiăୈࡼ3ሣJ3Dᔐ NBY98:9 ดᒙఎਈࡼcpptuࢯஂLj ૹ߅4ᄰࡸྸහདࣅLj᎖UGU! MDE ၫᔊஂ ߅ࠅၒNBY98:9ࡼ࠭ᒍઁख႙ၫᔊஂ)ᅄ9*ă࣪᎖ ࣗݷᔫLjNBY98:9ၒ߲8ᆡ࣪።᎖ࡩ༄EBDᒙࡼၫਜ਼ Ⴒઁࡼ1ᆡă࣪᎖ቖݷᔫLjᓍ૦ܘኍᄋ8ᆡჅገཇࡼEBD ᒙᆡਜ਼Ⴒઁࡼ2ᆡă࣪JDࡼFFQSPNቲ߈ܠဟLjᓍ૦ ܘኍဧᔢઁ2ᆡᆐ1Ljᑚᒬ༽ౚሆჇ8ᆡۻă߈ܠဟLj HPOܘኍިਭ߈ܠඡሢLj॥ᐌݙቲ߈ܠLjNBY98:9 ጐݙ።ࡊ߈ܠᒎഎă ܭ6/! EBDᒙ 7-BIT DATA BYTE ISET VSET (V) VOUT (V) 0000000 ISET(MAX) VSET(MAX) VMIN 0000001 ISET(MAX) 1-LSB VSET(MAX) 1-LSB VMIN + 1-LSB . . . . . . . . . . . . 1111110 ISET(MIN) + 1-LSB VSET(MIN) + 1-LSB VMAX 1-LSB 1111111 ISET(MIN) VSET(MIN) VMAX DATA OUTPUT BY MASTER D7 EBDᒋ ܭ6೫EBDᒋਜ਼࣪።ࡼJTFUĂWTFUਜ਼WPVUă ።ࡊ0ൔኯ ࡩNBY98:9ۻኰᒍဟLj၃ᅲඛৈᔊஂઁޘညጙৈ።ࡊ ൴ߡ)ᅄ:*ăᓍ૦ܘኍᆐক።ࡊᆡޘညጙৈऄᅪࡼဟᒩ൴ ߡăୈ።ࡊဟLjᏴ።ࡊဟᒩ൴ߡ໐ମ౯ࢅTEBLjጲۣᑺ TEBᏴ።ࡊဟᒩ൴ߡࡼ࢟ຳ໐ମۣߒᆮࢾࡼࢅ࢟ຳLjࡩ Ljથኊገఠೂਜ਼ۣߒဟମăᓍ૦ᎅ࠭૦߲ࣗᔢઁ ጙৈᔊஂઁLjᄰਭޘݙည።ࡊLjሶ࠭૦ීܭၫࠅ႙உ ၦăᑚᒬ༽ౚሆLj࠭૦ۣߒၫሣᆐLjဧᓍ૦ޘည TUPQᄟୈă ࡩNBY98:9ดݝᑵᏴ߈ܠဟLjޘ્ݙည።ࡊăጙࡡดݝ ቖᒲ໐ဟኔࣅLjFFQSPNၒྜྷਈܕဟLjభጲࣅ።ࡊ ൔኯLj۞౪ख႙TUBSUᄟୈਜ਼ୈᒍăᒑᎌดݝቖᒲ ໐ᅲ߅ઁLjNBY98:9ݣख႙።ࡊ൴ߡLjᏤଖኚࣗቖ ݷᔫă ྙਫWHPOᆚࡉࡵᔗጲۣᑺᑵཀྵ࢟ࡼ߈ܠኹLjNBY98:9ݙ ።ࡊFFQSPN߈ܠᒎഎăᄴဟLj߈ܠᒎഎ༄ܘኍሌख႙ቖ ᒎഎăᔢதጙࠨ߈ܠᒎഎઁLjྙਫEBDၫᒋᎌৎখLjJD ્ݙ።ࡊ߈ܠᒎഎ߈ܠFFQSPNă D6 D0 NOT ACKNOWLEDGE DATA OUTPUT BY MAX8798 ACKNOWLEDGE SCL FROM MASTER S START CONDITION 1 2 8 9 CLK1 CLK2 CLK8 CLK9 ACKNOWLEDGE CLOCK PULSE ᅄ:/! J3Dᔐሣ።ࡊ 26 ______________________________________________________________________________________ ดᒙఎਈࡼcpptuࢯஂLj ૹ߅4ᄰࡸྸහདࣅLj᎖UGU! MDE ᔄᇼࡼQDCݚ࣪࢟വᑵཀྵᔫऻޟᒮገăږᑍጲሆᓰᐌ భဣሚੑࡼQDCݚǖ • భถିቃࡍ࢟ഗણവࡼෂ૩Ljဍኹࢯஂࡼ࢟ঢĂ ၒ߲औጲૺၒ߲࢟ྏஜణၒྜྷ࢟ྏĂMYਜ਼ QHOE୭हᒙăᑚৈࡍ࢟ഗၒྜྷણവ࠭ၒྜྷ࢟ྏᑵ ఎဪLjள࢟ঢLjઁᒗJDࡼMY୭Ljഗ߲QHOELjᔢ ઁૄࡵၒྜྷ࢟ྏঌăࡍ࢟ഗၒ߲ણവ࠭ၒྜྷ࢟ྏᑵ ఎဪLjள࢟ঢĂၒ߲औ)E2*Ăၒ߲࢟ྏᑵLj ᔢઁᄰਭၒ߲࢟ྏਜ਼ၒྜྷ࢟ྏ࣡ࡼೌऩૄă። ݧ༦ࡼݚሣೌᑚቋણവᒦࡼᏄୈăᏴࡍ࢟ഗ ણവᒦ።ܜဧਭăྙਫݙถܜࡼજLj።ݧ ࣶৈ݀ቲਭጲଢ଼ࢅ࢟ᔜਜ਼࢟ঢă • ݧጙৈൈࡲ)QHOE*ೌဍኹࢯஂࡼၒྜྷĂၒ ߲࢟ྏ࣡ਜ਼QHOE୭ጲૺჅᎌࡼ࢟܃Ꮔୈă ᑚቋݧ༦ࡼݚሣቃෂ૩ຳෂೌᏴጙă ݧభถࡼൈݚሣభᄋൈLjଢ଼ࢅၒ߲࢟ ኹᆬ݆ਜ਼ᐅဉବख़ăጙৈෝผຳෂ)BHOE*ೌ BHOE୭ĂჅᎌनౣॊኹ࣡ĂᏥहॊኹ࣡Ă DPNQ࢟ྏ࣡ĂCPPTUਜ਼WMവ࢟ྏ࣡Ăጲૺ ୈ۳ݝൡăᄰਭQHOE୭ᒇೌᒗ۳ݝൡ LjဣሚQHOEਜ਼BHOEࡲࡼೌă߹ࠥᒄᅪLjᑚቋ ॊಭࡼຳෂᒄମݙገᏳቲჇೌă • नౣॊኹࡼ࢟ᔜ።భถణதनౣ୭हᒙăॊኹ ᒦቦߥᄿᔓሣ።ăྙਫ࢟ᔜहᒙ୷ᏐLjޠGC ᔓሣ્߅ᆐသནఎਈᐅဉࡼᄖሣăኊገᄂܰᓖፀǖܜ ဧनౣᔓሣణதMY࢟ࡼ܃ఎਈஂ࢛ă • JO୭ਜ਼WM୭വ࢟ྏ።భถణதୈăJO୭ ਜ਼WM୭വ࢟ྏࡼ።ݧᔓሣᒇᒗBHOE ୭ă • ᆐࡻᔢଛၾზሰ።Ljၒ߲࢟ྏᒗঌᏲࡼᔓሣገ ࡼĂభถă • భถିቃMYஂ࢛ࡼߛࡁLj݀ဧ༦ăMYஂ࢛። Ꮠಭनౣஂ࢛ਜ਼ෝผăྙᎌܘገLjభጲᒇഗᔓሣ ᔫᆐືă NBY98:9ຶৰۇ߲೫ጙৈᑵཀྵࡼ࢟വݚۇဣಿLjభ ᔫᆐଐݬఠă ______________________________________________________________________________________ 27 NBY98:9 QDCݚਜ਼ ``````````````````````````````` በຢቧᇦ TRANSISTOR COUNT: 15,227 PROCESS: BiCMOS NEG POS OUT BOOST BGND VL IN TOP VIEW SHDN VCOM ``````````````````````````````` ୭ᒙ 27 26 25 24 23 22 21 20 19 LX LX 28 18 SET 29 17 PGND 30 16 WPP SDA PGND FB COMP 31 15 SCL 32 14 AGND GOFF GON 34 12 35 11 SCLS WPN VDD DISH 36 10 GND MAX8798 4 5 6 7 8 9 OE 3 CPV 2 13 STVP STV OECON 1 CKV 33 CKVCS CKVBCS CKVB NBY98:9 ดᒙఎਈࡼcpptuࢯஂLj ૹ߅4ᄰࡸྸහདࣅLj᎖UGU! MDE THIN QFN 28 ______________________________________________________________________________________ ดᒙఎਈࡼcpptuࢯஂLj ૹ߅4ᄰࡸྸහདࣅLj᎖UGU! MDE QFN THIN.EPS ______________________________________________________________________________________ 29 NBY98:9 ````````````````````````````````````````````````````````````````````````````` ॖᓤቧᇦ (۾ၫᓾ೯ᄋࡼॖᓤᅄభถဵݙᔢதࡼਖৃLjྙኊᔢதࡼॖᓤᅪተቧᇦLj༿އኯ www.maxim-ic.com.cn/packagesă) NBY98:9 ดᒙఎਈࡼcpptuࢯஂLj ૹ߅4ᄰࡸྸහདࣅLj᎖UGU! MDE ``````````````````````````````````````````````````````````````````````````````` ॖᓤቧᇦ)ኚ* (۾ၫᓾ೯ᄋࡼॖᓤᅄభถဵݙᔢதࡼਖৃLjྙኊᔢதࡼॖᓤᅪተቧᇦLj༿އኯ www.maxim-ic.com.cn/packagesă) 30 ______________________________________________________________________________________ ดᒙఎਈࡼcpptuࢯஂLj ૹ߅4ᄰࡸྸහདࣅLj᎖UGU! MDE ኀࢿࠨၫ ኀࢿ྇໐ 0 9/07 ႁී ᔢ߱۾ۈă ኀখ೫Fmfdusjdbm! Dibsbdufsjtujdtܭă 1 6/08 ࣪ၫᓾ೯ᄰຠቲ೫ኀখă ኀখ — 1–5, 7, 8 1–8, 13, 14, 17, 19–22, 24, 26, 27 Nbyjn۱யࠀူێ ۱ய 9439ቧረ ᎆᑶܠ൩ 211194 ॅ࢟જǖ911!921!1421 ࢟જǖ121.7322 62:: ࠅᑞǖ121.7322 63:: Nbyjn࣪ݙNbyjnޘອጲᅪࡼྀੜ࢟വဧঌᐊLjጐݙᄋᓜಽభăNbyjnۣഔᏴྀੜဟମĂᎌྀੜᄰۨࡼ༄ᄋሆኀখޘອᓾ೯ਜ਼ਖৃࡼཚಽă Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ______________________ 31 © 2008 Maxim Integrated Products ဵ Nbyjn!Joufhsbufe!Qspevdut-!Jod/ ࡼᓖݿܪă NBY98:9 ______________________________________________________________________________ ኀࢿ಼ဥ