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The Future of Multicore Dr. Peter Dzwig Partner Concertant LLP

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The Future of Multicore Dr. Peter Dzwig Partner Concertant LLP
The Future of Multicore
Dr. Peter Dzwig
Partner Concertant LLP
& Chairman BCS DSCSG
The next 15 years will see a revolution in
microprocessors every bit as profound as
the last 40 years – in many ways much
more so.
Copyright © 2011, Concertant LLP
Outline of Talk

Where we have been, where we are and where
we could be going – and why

What's holding us back

Some speculation beyond 2021
Copyright © 2011, Concertant LLP
3
Let's start at the beginning


Likely configuration of processors
This is about general purpose processors, not
specialised ones
−
Embedded and “workstations” and will be the
workhorse of high-end HPC too.
Copyright © 2011, Concertant LLP
How We Got Here
Feature size reduction 1996 - 2021
350
300
250
nanometres
200
150
100
50
0
1996
1998
1999
2001
2003
2005
2007
Year
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2009
2011
2013
2015
2017
2019
2021
Size reduction
Reduction in feature size 1963-2021
4.5000
4.0000
3.5000
3.0000
Ratio
2.5000
2.0000
1.5000
1.0000
0.5000
0.0000
1960
1970
1980
1990
Year
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2000
2010
2020
2030
A Dose of Reality
The Walters' Diagram
Market Launch & Penetration
3 – 5 years
Product
Development and/or
implementation
phase
Laboratory
3-5 years
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~2-3years
Evolution of Core Count
Core count 2004 - 2020
10000
count
1000
"Moore's Law" Cores General
Purpose
"Moore's Law" Cores Embedded
Engineering capability
Likely/announced
100
10
1
2002
2004
2006
2008
2010
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2012
2014
2016
2018
2020
2022
Configuration

High core count (HCC)

Main memory local to cores

Processors giving specific functionality

Switched architecture

Reconfigurable to cope with failures etc

AND CORE COUNT MAY GROW
EXPONENTIALLY
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Some current examples
Picochip
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Tilera 100
Example embedded chip
From JM Cardoso 2007
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Limiting factors

Physical limits

Limits of die size and yields

Power-consumption

Communication bandwidth

COMPLEXITY!!!!
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Physical limits

We are getting to scales comparable with
impurity clusters and lattice spacings
−
22nm node has physical gate size of 30
x 30 x 30 atoms for 9nm gate
FinFETs are still smaller
Other effects particularly thermal,
(phonons) etc. migration become
important

−
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Development


Will cores be the transistors of the (near)
future?
In short it seems unlikely.
−
achieving Density

Need new technologies

...as ever power

EVEN MORE COMPLEX
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Is 3D the answer??

In short “no”, more like 2025 before
production
−
FinFETs aren't 3D
−
Remember Walters Diagram
Image: Intel/New York Times
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This is...
Nudd GR, in FU, VLSI for Pattern Recognition and Image Processing, 1984
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Modern Equivalent
IBM future 3d chip Source: IBM
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So...


Realistically we won't get beyond “standard”
multicore in 10 years – for mass markets.
How many cores?
−
Concertant surveys suggest embedded at
100+, non-embedded 32
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Recall Evolution of Core Count
Core count 2004 - 2020
10000
count
1000
"Moore's Law" Cores General
Purpose
"Moore's Law" Cores Embedded
Engineering capability
Likely/announced
100
10
1
2002
2004
2006
2008
2010
Copyright © 2011, Concertant LLP
2012
2014
2016
2018
2020
2022
The issue


What is achieved by manufacturers lags
behind engineering limit – by a long way!
The reason? Software demotivates
−
It isn't there yet and development is slow
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What sort of Architecture?

Big question, may well not be IA!
−


Might simulate IA
High core densities implies need for simpler
architectures
Densities and memory requirements limit number
of devices available and complexity
Typical present generation mainstream
processor has >750 million devices of which
~70% are memory
Move back to RISC? VLIW?


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Intel Teraflop (“Polaris”) Chip
VLIW
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Aubrey Isle (KC) chip
Hybrid
SCC 48-core Chip
IA
Software

Software = OS + languages + applications

Current OSs aren't that good at ||ism

Nor are languages

Nor are applications
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Management

Multicores with HCC suffer from deterioration
−


For a standard design having a whole chip
lifetime of T using the same technology a

102 core processor has MTTCF ~ 10-2T

104 core processor has MTTCF ~ 10-4T
Number of cores and available functionality
changes with time.
Requires management
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OS requirements

So OS of must:
−
(i) provide standard OS functionality across many
cores
−
(ii) manage core failure


Much more than at present
i.e. re-allocation of tasks with minimal disruption to
the performance of the system.

Hide the complexities from the user?

Micro-kernels?
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“A Virtual Layer”?

Does “need to hide” mandate a virtual layer?
−

Would assist in the continued use of “legacy”
languages and applications,
Offers stable target as core counts rise
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Tools/languages


Concurrency isn't parallelism
Languages dominated by C/C+ with frameworks
in future
−

Source Concertant
Must languages include “parallel components” to
work well?
Copyright © 2011, Concertant LLP
The Core Conundrum

2 cores
−

4 cores
−

“How do we really use these cores?
16 cores
−

3 cores for work and...
8 cores
−

1 for work 1 for spam
Got to go parallel
100 cores
− ????
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But...

Conjecture:
−
“In general, we cannot guarantee an optimal
implementation (wrt throughput performance) of a
parallel algorithm across a 'large' number of
processors/cores”
−
Even more difficult when cores are failing
−
Have to accept that all solutions are sub-optimal
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Need tools



Need tools to help build parallel code
−
Automatic parallelisers don't work well...
−
Treat all claims with care!!
Need:
−
Better editing, simulation, load balancing etc tools
−
Algorithm/processor design space is huge, must
constrain DS, make “sensible” choices
A large market opportunity!
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Approaches




Patterson's “dwarves”: how many and are they
all-embracing?
Library functionality à la GPars, Datarush and
others
Language extensions, new languages,
frameworks
None of these are complete solutions; none
cater for HCC growth at predicted rates.
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What will Multicore look like in
2021?


Likely small compact cores with very fast local
memory; switched network; internal bisectional
b/w in 100s TB (PB?)
OS supporting management and “hiding” system
from user/developer
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Applications

Who will use it?
−
Image Processing and Analysis
−
Biotech
−
Databases
−
Finance
−
Automotive and Aerospace
−
Games
−
Geophysics
−
Defence
−
Pharmaceuticals
Data for 2015 and beyond
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The Big Challenge
How do we make this technology
accessible to the general user?
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Beyond 2021

3D – sometime ~2025?
−
Another huge change in computing
Is that the ultimate multicore
revolution?
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