MAX2851 5GHz, 5-Channel MIMO Receiver General Description Features
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MAX2851 5GHz, 5-Channel MIMO Receiver General Description Features
19-5121; Rev 1; 3/10 TION KIT EVALUA BLE IL AVA A 5GHz, 5-Channel MIMO Receiver The MAX2851 is a single-chip, 5-channel RF receiver IC designed for 5GHz wireless HDMI™ applications. The IC includes all circuitry required to implement the complete 5-channel MIMO RF receiver function and crystal oscillator, providing a fully integrated receive path, VCO, frequency synthesis, and baseband/control interface. It includes a fast-settling sigma-delta RF fractional synthesizer with 76Hz frequency programming step size. The IC also integrates on-chip I/Q amplitude and phase-error calibration circuits. The receiver includes both an inchannel RSSI and also an RF RSSI. On-chip monolithic filters are included for receiver I/Q baseband signal channel selection, for supporting both 20MHz and 40MHz RF channels. The baseband filtering and Rx signal paths are optimized to meet stringent WHDI requirements. The downconverter local oscillator is coherent among all the receiver channels. The reverse-link control channel uses an on-chip 5GHz OFDM transmitter. It shares the RF synthesizer and LO generation circuit with the MIMO receivers. Dynamic on/off control of the external PA is implemented with programmable precision voltage. An analog mux routes external PA power-detect voltage to the RSSI pin. The MIMO receiver chip is housed in a small 68-pin TQFN leadless plastic package with exposed paddle. Applications 5GHz Wireless HDMI (WHDI™) 5GHz FDD Backhaul and WiMAX™ 5GHz MIMO Receiver Up to Five Spatial Streams 5GHz Beam Steering Receiver Features S 5GHz, 5x MIMO Downlink Receivers, Single-Uplink IEEE 802.11a Transmitter S 4900MHz to 5900MHz Frequency Range S Coherent LO Among Receivers S 4.5dB Rx Noise Figure S 70dB Rx Gain Control Range with 2dB Step Size, Digitally Controlled S 60dB Dynamic Range Receiver RSSI S RF Wideband Receiver RSSI S Programmable 20MHz/40MHz Rx I/Q Lowpass Channel Filters S -5dBm Transmit Power (54Mbps OFDM) S 31dB Tx Gain Control Range with 0.5dB Step Size, Digitally Controlled S Tx/Rx I/Q Error and LO Leakage Detection and Adjustment S Programmable 20MHz/40MHz Tx I/Q Lowpass Anti-Aliasing Filter S Analog Mux for PA Power Detect S PA On/Off Control S Sigma-Delta Fractional-N PLL with 76Hz Resolution S Monolithic Low-Noise VCO with -35dBc Integrated Phase Noise S 4-Wire SPIK Digital Interface S I/Q Analog Baseband Interface S Digital Tx/Rx Mode Control S On-Chip Digital Temperature Sensor Readout S Complete Baseband Interface S Digital Tx/Rx Mode Control S +2.7V to +3.6V Supply Voltage S Small 68-Pin TQFN Package (10mm x 10mm) Ordering Information PART TEMP RANGE PIN-PACKAGE MAX2851ITK+ -25NC to +85NC 68 TQFN-EP* +Denotes a lead(Pb)-free/RoHS-compliant package. *EP = Exposed paddle. HDMI is a trademark of HDMI Licensing, LLC. WHDI is a trademark of WHDI Special Interest Group. WiMAX is a trademark of the WiMAX Forum. Typical Operating Circuit appears at end of data sheet. SPI is a trademark of Motorola, Inc. ________________________________________________________________ Maxim Integrated Products 1 www.BDTIC.com/maxim For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. MAX2851 General Description MAX2851 5GHz, 5-Channel MIMO Receiver ABSOLUTE MAXIMUM RATINGS VCC_ Pins to GND.................................................-0.3V to +3.9V RF Inputs Max Current: RXRF1+, RXRF1-, RXRF2+, RXRF2-, RXRF3+, RXRF3-, RXRF4+, RXRF4-, RXRF5+, RXRF5- to GND.................................. -1mA to +1mA RF Outputs: TXRF+, TXRF- to GND......................-0.3V to +3.9V Analog Inputs: TXBBI+, TXBBI-, TXBBQ+, TXBBQ-, PA_DET, XTAL, XTAL_CAP to GND...................................-0.3V to +3.9V Analog Outputs: RXBBI1+, RXBBI1-, RXBBQ1+, RXBBQ1-, RXBBI2+, RXBBI2-, RXBBQ2+, RXBBQ2-, RXBBI3+, RXBBI3-, RXBBQ3+, RXBBQ3-, RXBBI4+, RXBBI4-, RXBBQ4+, RXBBQ4-, RXBBI5+, RXBBI5-, RXBBQ5+, RXBBQ5-, RSSI, CLKOUT2, BYP_VCO, CPOUT+, CPOUT-, PA_BIAS to GND....................................................................-0.3V to +3.9V Digital Inputs: ENABLE, CS, SCLK, DIN to GND.........................................................-0.3V to +3.9V Digital Outputs: DOUT, CLKOUT to GND.............-0.3V to +3.9V Short-Circuit Duration Analog Outputs.................................................................. 10s Digital Outputs.................................................................... 10s RF Input Power............................................................... +10dBm RF Output Differential Load VSWR......................................... 6:1 Continuous Power Dissipation (TA = +85NC) 68-Pin TQFN (derate 29.4mW/NC above +70NC) .......2352mW Operating Temperature Range........................... -25NC to +85NC Junction Temperature......................................................+150NC Storage Temperature Range............................. -65NC to +160NC Lead Temperature (soldering, 10s).................................+300NC Soldering Temperature (reflow).......................................+260NC Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. CAUTION! ESD SENSITIVE DEVICE DC ELECTRICAL CHARACTERISTICS (Operating conditions unless otherwise specified: VCC = 2.7V to 3.6V, TA = -25NC to +85NC, ENABLE set according to operating mode, CS = high, SCLK = DIN = low, transmitter in maximum gain. Power matching and termination for the differential RF output pins using the Typical Operating Circuit; 100mVRMS differential I and Q signals applied to I and Q baseband inputs of transmitters in transmit mode. Typical values measured at VCC = 2.85V, TA = +25NC, LO freq = 5.35GHz. Channel bandwidth is set to 40MHz. PA control pins open circuit, VCC_PA_BIAS is disconnected.) (Note 1) PARAMETER CONDITIONS Supply Voltage MIN TYP MAX 2.7 Shutdown mode Clockout only mode with load = 10pF at CLKOUT pin TA = +25NC 10 XTAL oscillator, CLKOUT2 is off 3.7 XTAL oscillator, CLKOUT2 is on 4.6 TCXO input, CLKOUT2 is off 4.8 TCXO input, CLKOUT2 is on 6.1 Standby mode Supply Current Receive calibration mode 7.0 183 212 144 184 Five receivers are on 367 458 One receiver is on 248 Five receivers are on 435 mA 517 256 Rx I/Q Output Common-Mode Voltage 0.88 Tx Baseband Input CommonMode Voltage Operating Range 0.5 Source current V FA One receiver is on Transmit calibration mode Tx Baseband Input Bias Current UNITS 60 Transmit mode Receive mode 3.6 1.1 1.34 V 1.1 V 20 FA 10 2 _______________________________________________________________________________________ www.BDTIC.com/maxim 5GHz, 5-Channel MIMO Receiver (Operating conditions unless otherwise specified: VCC = 2.7V to 3.6V, TA = -25NC to +85NC, ENABLE set according to operating mode, CS = high, SCLK = DIN = low, transmitter in maximum gain. Power matching and termination for the differential RF output pins using the Typical Operating Circuit; 100mVRMS differential I and Q signals applied to I and Q baseband inputs of transmitters in transmit mode. Typical values measured at VCC = 2.85V, TA = +25NC, LO freq = 5.35GHz. Channel bandwidth is set to 40MHz. PA control pins open circuit, VCC_PA_BIAS is disconnected.) (Note 1) PARAMETER CONDITIONS MIN TYP MAX UNITS LOGIC INPUTS: ENABLE, SCLK, DIN, CS VCC 0.4 Digital Input-Voltage High, VIH Digital Input-Voltage Low, VIL V 0.3 V Digital Input-Current High, IIH (Note 2) -1 +1 FA Digital Input-Current Low, IIL LOGIC OUTPUTS: DOUT, CLKOUT -1 +1 FA VCC 0.4 Digital Output-Voltage High, VOH Sourcing 1mA Digital Output-Voltage Low, VOL Sinking 1mA Digital Output Voltage in Shutdown Mode Sinking 1mA V 0.4 VOL V V AC ELECTRICAL CHARACTERISTICS—Rx MODE (Operating conditions unless otherwise specified: VCC = 2.7V to 3.6V, TA = -25NC to +85NC, RF freq = 5.351GHz, LO freq = 5.35GHz. Reference freq = 40MHz, ENABLE = high, CS = high, SCLK = DIN = low, with power matching at RXRF_+ and RXRF_- differential ports using the Typical Operating Circuit. Receiver I/Q output at 100mVRMS loaded with 10kI differential load resistance and 10pF load capacitance. RSSI pin is loaded with 10kI load resistance to ground. Typical values measured at VCC = 2.85V, TA = +25NC, channel bandwidths of 40MHz.) (Note 1) PARAMETER CONDITIONS MIN TYP MAX UNITS RECEIVER SECTION: RF INPUT TO I/Q BASEBAND LOADED OUTPUT Includes 50I to 100I RF Balun and Matching RF Input Frequency Range Peak-to-Peak Gain Variation Over RF Frequency Range at One Temperature RF Input Return Loss 4.9 4.9GHz to 5.9GHz All LNA settings Maximum gain, Main address 1 D[7:0] = 11111111 Total Voltage Gain 1.8 Baseband Gain Range RF Gain Change Settling Time -2 Main address 1 D[7:5] = 110 -8 -16 Main address 1 D[7:5] = 001 -32 Main address 1 D[7:5] = 000 -40 Baseband Gain Step Gain settling to within Q0.5dB of steady state, RXHP = 1 4.2 dB 28 dB 68 Main address 1 D[7:5] = 101 From maximum baseband gain (Main address 1 D[3:0] = 1111) to minimum baseband gain (Main address 1 D[3:0] = 0000) GHz -6 61.8 Minimum gain, Main address 1 D[7:0] = 00000000 RF Gain Steps Relative to Maximum Gain 5.9 +6.9 30 dB dB 32 dB 2 dB 400 ns _______________________________________________________________________________________ 3 www.BDTIC.com/maxim MAX2851 DC ELECTRICAL CHARACTERISTICS (continued) MAX2851 5GHz, 5-Channel MIMO Receiver AC ELECTRICAL CHARACTERISTICS—Rx MODE (continued) (Operating conditions unless otherwise specified: VCC = 2.7V to 3.6V, TA = -25NC to +85NC, RF freq = 5.351GHz, LO freq = 5.35GHz. Reference freq = 40MHz, ENABLE = high, CS = high, SCLK = DIN = low, with power matching at RXRF_+ and RXRF_- differential ports using the Typical Operating Circuit. Receiver I/Q output at 100mVRMS loaded with 10kI differential load resistance and 10pF load capacitance. RSSI pin is loaded with 10kI load resistance to ground. Typical values measured at VCC = 2.85V, TA = +25NC, channel bandwidths of 40MHz.) (Note 1) PARAMETER CONDITIONS Baseband Gain Change Settling Time Gain settling to within Q0.5dB of steady state, RXHP = 1 4.5 Maximum RF gain - 16dB (Main address 1 D[7:5] = 101) 15 Balun input referred, integrated from 10kHz to 19MHz at I/Q baseband output for 40MHz RF bandwidth Maximum RF gain (Main address 1 D[7:5] = 111) 4.5 Maximum RF gain - 16dB (Main address 1 D[7:5] = 101) 15 -65dBm wanted signal, RF gain = max (Main address 1 D[7:0] = 11101001) -13 -49dBm wanted signal, RF gain = max - 16dB (Main address 1 D[7:0] = 10101001) -5 -45dBm wanted signal, RF gain = max - 32dB (Main address 1 D[7:0] = 00111111) 11 -65dBm wanted signal, RF gain = max (Main address 1 D[7:0] = 11101001) -13 -49dBm wanted signal, RF gain = max - 16dB (Main address 1 D[7:0] = 10101001) -5 -45dBm wanted signal, RF gain = max - 32dB (Main address 1 D[7:0] = 00101001) 11 Out-of-Band Input IP3 40MHz RF channel, two-tone jammers at +50MHz and +96MHz frequency offset with -39dBm/tone MAX 200 Maximum RF gain (Main address 1 D[7:5] = 111) 20MHz RF channel, two-tone jammers at +25MHz and +48MHz frequency offset with -39dBm/tone Input 1dB Gain Compression TYP Balun input referred, integrated from 10kHz to 9.5MHz at I/Q baseband output for 20MHz RF bandwidth DSB Noise Figure 1dB Gain Desensitization by Alternate Channel Blocker MIN UNITS ns dB dBm Blocker at Q40MHz offset frequency for 20MHz RF channel -24 Blocker at Q80MHz offset frequency for 40MHz RF channel -24 Max RF gain (Main address 1 D[7:5] = 111) -34 Max RF gain - 8dB (Main address 1 D[7:5] = 110) -25 Max RF gain - 16dB (Main address 1 D[7:5] = 101) -18 Max RF gain - 32dB (Main address 1 D[7:5] = 001) -1 dBm 4 _______________________________________________________________________________________ www.BDTIC.com/maxim dBm 5GHz, 5-Channel MIMO Receiver (Operating conditions unless otherwise specified: VCC = 2.7V to 3.6V, TA = -25NC to +85NC, RF freq = 5.351GHz, LO freq = 5.35GHz. Reference freq = 40MHz, ENABLE = high, CS = high, SCLK = DIN = low, with power matching at RXRF_+ and RXRF_- differential ports using the Typical Operating Circuit. Receiver I/Q output at 100mVRMS loaded with 10kI differential load resistance and 10pF load capacitance. RSSI pin is loaded with 10kI load resistance to ground. Typical values measured at VCC = 2.85V, TA = +25NC, channel bandwidths of 40MHz.) (Note 1) PARAMETER Output 1dB Gain Compression Baseband -3dB Lowpass Corner Frequency Baseband Filter Stopband Rejection Baseband -3dB Highpass Corner Frequency CONDITIONS MIN TYP Over passband frequency range, at any gain setting, 1dB compression point 0.63 Main address 0 D1 = 0 9.5 Main address 0 D1 = 1 19 Rejection at 30MHz offset frequency for 20MHz channel 74 Rejection at 60MHz offset frequency for 40MHz channel 69 Main address 5 D1 = 1 600 Main address 5 D1 = 0, Main address 4 D3 = 1 10 Main address 5 D1 = 0, Main address 4 D3 = 0 (Note 3) 0.1 50Fs after enabling receive mode and togging RXHP Steady-State I/Q Output DC Error from 1 to 0, averaged over many measurements if I/Q with AC-Coupling noise voltage exceeds 1mVRMS, at any given gain setting, no input signal, 1-sigma value MAX UNITS VP-P MHz dB kHz 2 mV I/Q Gain Imbalance 1MHz baseband output, 1-sigma value 0.1 dB I/Q Phase Imbalance 1MHz baseband output, 1-sigma value 0.2 deg Sideband Suppression 1MHz baseband output 40 dB LO frequency -75 Receiver Spurious Signal Emissions 2O LO frequency -62 3O LO frequency -75 4O LO frequency -54 RF RSSI Output Voltage -25dBm input power 1.6 Baseband RSSI Slope 18 dBm/ MHz V 26.5 37 mV/dB Baseband RSSI Maximum Output Voltage 2.3 V Baseband RSSI Minimum Output Voltage 0.5 V RF Loopback Conversion Gain Tx VGA gain at max (Main address 9 D[9:4] = 111111), Rx VGA gain at max - 24dB (Main address 1 D[3:0] = 0101) -17.1 -10 -1.7 dB _______________________________________________________________________________________ 5 www.BDTIC.com/maxim MAX2851 AC ELECTRICAL CHARACTERISTICS—Rx MODE (continued) MAX2851 5GHz, 5-Channel MIMO Receiver AC ELECTRICAL CHARACTERISTICS—Tx MODE (Operating conditions unless otherwise specified: VCC = 2.7V to 3.6V, TA = -25NC to +85NC, RF freq = 5.351GHz, LO freq = 5.35GHz. Reference freq = 40MHz, ENABLE = high, CS = high, SCLK = DIN = low, with power matching at TXRF+ and TXRF- differential ports using the Typical Operating Circuit; 100mVRMS sine and cosine signal applied to I/Q baseband inputs of transmitter (differential DC-coupled). Typical values measured at VCC = 2.85V, TA = +25NC, channel bandwidths of 40MHz.) (Note 1) PARAMETER CONDITIONS MIN TYP MAX UNITS 5.9 GHz 1.55 dB TRANSMIT SECTION: Tx BASEBAND I/Q INPUTS TO RF OUTPUTS Includes Matching and Balun Loss RF Output Frequency Range Peak-to-Peak Gain Variation Over RF Band 4.9 At one temperature 0.7 20MHz OFDM signal conforming to spectral emission mask and -34dB EVM -3 40MHz OFDM signal confirming to spectral emission mask and -34dB EVM -3 Output 1dB Gain Compression Relative to typical maximum output power at 9.5MHz input frequency 11 dBc Input 1dB Gain Compression At 19MHz input frequency, over input common-mode voltage between 0.5V and 1.1V 380 mVRMS Maximum Output Power Gain Control Range dBm 24 31.5 34 dB Gain Control Step 0.5 dB RF Output Return Loss -3 dB Unwanted Sideband Over RF channel, RF frequency, baseband frequency, and gain settings (Note 4) -40 dBc Carrier Leakage Over RF channel, RF frequency, and gain settings (Note 4) -29 Tx I/Q Input Impedance (R || C) Baseband Filter Stopband Rejection Tx Calibration Ftone Level Tx Calibration RF Gain Step Relative to Maximum Gain Tx Calibration Baseband Gain Step Relative to Maximum Gain -15 dBc Minimum differential resistance 60 kI Maximum differential capacitance 2 pF At 30MHz frequency offset for 20MHz RF channel 86 At 60MHz frequency offset for 40MHz RF channel 67 At Tx gain code (Main address 9 D[9:4]) = 100010 and -15dBc carrier leakage (Local address 27 D[2:0] = 110 and Main address 1 D[3:0] = 0000) -24 Local address 27 D[1:0] = 01 -14 Local address 27 D[1:0] = 00 -28 Local address 27 D2 = 0 -5 6 _______________________________________________________________________________________ www.BDTIC.com/maxim dB dBVRMS dB dB 5GHz, 5-Channel MIMO Receiver (Operating conditions unless otherwise specified: VCC = 2.7V to 3.6V, TA = -25NC to +85NC, freq = 5.35GHz. Reference freq = 40MHz, ENABLE = high, CS = high, SCLK = DIN = low. Typical values measured at VCC = 2.85V, TA = +25NC, LO freq = 5.35GHz.) (Note 1) PARAMETER CONDITIONS MIN TYP MAX UNITS 5.9 GHz FREQUENCY SYNTHESIZER RF Channel Center Frequency 4.9 Channel Center Frequency Programming Step Closed-Loop Integrated Phase Noise 76.294 Hz Loop BW = 200kHz, integrate phase noise from 1kHz to 10MHz -35 dBc 0.8 mA fOFFSET = 0 to 19MHz -42 fOFFSET = 40MHz -66 Charge-Pump Output Current Spur Level Reference Frequency Reference Frequency Input Levels 40 AC-coupled to XTAL pin Base-to-ground capacitance Crystal Capacitance Tuning Step CLKOUT Signal Level 10pF load capacitance CLKOUT2 Signal Level 4pF load capacitance MHz 800 Maximum Crystal Motional Resistance Crystal Capacitance Tuning Range dBc VCC 0.8 mVP-P 50 I 30 pF 140 fF VCC 0.1 VP-P 0.3 VP-P AC ELECTRICAL CHARACTERISTICS—MISCELLANEOUS BLOCKS (Operating conditions unless otherwise specified: VCC = 2.7V to 3.6V, TA = -25NC to +85NC. Reference freq = 40MHz, ENABLE = high, CS = high, SCLK = DIN = low. Typical values measured at VCC = 2.85V, TA = +25NC.) (Note 1) PARAMETER CONDITIONS MIN TYP MAX UNITS 15 32 mV PA POWER-DETECTOR MUX Output Voltage Drop VIN = 2.0V, load resistance = 10kI to ground PA ON/OFF CONTROL VCC_PA_BIAS Input Voltage Range 3.1 3.6 V VCC_PA_BIAS Supply Current With 10mA load at PA_BIAS 10.5 Output High Level 10mA load current, Main address 11 D[7:5] = 011 2.8 V Output Low Level 1mA load current, Main address 11 D[7:5] = 011 25 mV 0.3 Fs Turn-On Time Measured from CS rising edge ON-CHIP TEMPERATURE SENSOR Digital Output Code Readout at DOUT pin through Main address 3 D[4:0] TA = +25NC 13 TA = +85NC 22 TA = -25NC 2 mA _______________________________________________________________________________________ 7 www.BDTIC.com/maxim MAX2851 AC ELECTRICAL CHARACTERISTICS—FREQUENCY SYNTHESIS MAX2851 5GHz, 5-Channel MIMO Receiver AC ELECTRICAL CHARACTERISTICS—TIMING (Operating conditions unless otherwise specified: VCC = 2.7V to 3.6V, TA = -25NC to +85NC, freq = 5.35GHz. Reference freq = 40MHz, ENABLE = high, CS = high, SCLK = DIN = low. Typical values measured at VCC = 2.85V, TA = +25NC, LO freq = 5.35GHz.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS SYSTEM TIMING Shutdown Time 2 Fs Maximum Channel Switching Time Loop bandwidth = 200kHz, settling to within Q1kHz from steady state 2 ms Maximum Channel Switching Time with Preselected VCO Sub-Band Loop bandwidth = 200kHz, settling to within Q1kHz from steady state 56 Fs Rx/Tx Turnaround Time Measured from CS rising edge Rx to Tx mode, Tx gain settles to within 0.2dB of steady state Tx to Rx mode with RXHP = 1, Rx gain settles to within 0.5dB of steady state Tx Turn-On Time (from Standby Mode) Measured from CS rising edge, Tx gain settles to within 0.2dB of steady state Tx Turn-Off Time (to Standby Mode) From CS rising edge Rx Turn-On Time (from Standby Mode) Measured from CS rising edge, Rx gain settles to within 0.5dB of steady state Rx Turn-Off Time (to Standby Mode) From CS rising edge 2 Fs 2 2 Fs 0.1 Fs 2 Fs 0.1 Fs 8 _______________________________________________________________________________________ www.BDTIC.com/maxim 5GHz, 5-Channel MIMO Receiver (Operating conditions unless otherwise specified: VCC = 2.7V to 3.6V, TA = -25NC to +85NC, freq = 5.35GHz. Reference freq = 40MHz, ENABLE = high, CS = high, SCLK = DIN = low. Typical values measured at VCC = 2.85V, TA = +25NC, LO freq = 5.35GHz.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 4-WIRE SERIAL INTERFACE TIMING (Figure 1) SCLK Rising Edge to CS Falling Edge Wait Time tCSO 6 ns Falling Edge of CS to Rising Edge of First SCLK Time tCSS 6 ns DIN to SCLK Setup Time tDS 6 ns DIN to SCLK Hold Time tDH 6 ns SCLK Pulse-Width High tCH 6 ns SCLK Pulse-Width Low tCL 6 ns Last Rising Edge of SCLK to Rising Edge of CS or Clock to Load Enable Setup Time tCSH 6 ns CS High Pulse Width tCSW 50 ns Time Between Rising Edge of CS and the Next Rising Edge of SCLK tCS1 6 ns SCLK Frequency fCLK 40 MHz Rise Time tR 2.5 ns Fall Time tF 2.5 ns Note 1: The MAX2851 is production tested at TA = +25NC, minimum/maximum limits at TA = +25NC are guaranteed by test unless otherwise specified. Minimum/maximum limits at TA = -25NC and +85NC are guaranteed by design and characterization. There is no power-on register settings self-reset; recommended register settings must be loaded after VCC is applied. Note 2: Minimum/maximum limit is guaranteed by design and characterization. Note 3: It is currently not recommended and not tested. For test coverage support, contact manufacturer. Note 4: For optimal Rx and Tx quadrature accuracy over temperature, the user can utilize the Rx calibration and Tx calibration circuit to assist quadrature calibration. _______________________________________________________________________________________ 9 www.BDTIC.com/maxim MAX2851 AC ELECTRICAL CHARACTERISTICS—TIMING (continued) Typical Operating Characteristics (VCC = 2.8V, TA = +25NC, fLO = 5.35GHz, fREF = 40MHz, CS = high, SCLK = DIN = low, RF BW = 20MHz, Tx output at 50ω unbalanced output of balun, using the MAX2851 Evaluation Kit, unless otherwise noted.) RECEIVER 146 TA = +25°C 144 142 370 TA = +25°C 365 TA = -40°C TA = -40°C 25 MAX - 16dB 15 MAX - 8dB MAX 5 0 2.6 2.7 2.8 2.9 3.0 3.1 3.2 3.3 3.4 3.5 3.6 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 VCC (V) VCC (V) Rx VGA GAIN SETTINGS Rx3 MAXIMUM GAIN vs. FREQUENCY Rx3 MAXIMUM GAIN vs. TEMPERATURE AND FREQUENCY Rx2 MAXIMUM GAIN WITH FIXED LNA SUB-BAND (MAIN ADDRESS 2 D[6:5]) LNA = MAX - 16dB 50 LNA = MAX - 24dB 45 40 LNA = MAX - 32dB 69 68 TA = +85°C 67 65 63 61 66 59 25 65 57 20 64 LNA = MAX - 40dB 30 BAND 2 BAND 1 69 TA = +25°C 70 67 35 BAND 0 71 71 GAIN (dB) 55 MAX2851 toc06 72 60 73 GAIN (dB) LNA = MAX - 8dB TA = -20°C 73 75 MAX2851 toc05 65 74 MAX2851 toc04 LNA = MAX GAIN 70 BAND 3 55 4.9 5.0 5.1 5.2 5.3 5.4 5.5 5.6 5.7 5.8 5.9 4.9 5.0 5.1 5.2 5.3 5.4 5.5 5.6 5.7 5.8 5.9 4.9 5.0 5.1 5.2 5.3 5.4 5.5 5.6 5.7 5.8 5.9 FREQUENCY (GHz) FREQUENCY (GHz) FREQUENCY (GHz) LNA = MAX 70 LNA = MAX - 8dB 60 69 LNA = MAX - 16dB GAIN (dB) 50 68 67 Rx5 66 Rx1 40 30 20 10 LNA = MAX - 32dB 0 64 4.9 5.0 5.1 5.2 5.3 5.4 5.5 5.6 5.7 5.8 5.9 FREQUENCY (GHz) LNA = MAX - 24dB LNA = MAX - 40dB 2 10 FBB = 1MHz TA = +25°C 1.2 OUTPUT V1dB (VRMS) Rx4 1.4 MAX2851 toc08 Rx2 MAX2851 toc07 Rx3 Rx OUTPUT V1dB vs. GAIN SETTING Rx GAIN vs. BASEBAND VGA GAIN 80 MAX2851 toc09 Rx MAXIMUM GAIN vs. FREQUENCY 71 65 MAX - 24dB 20 2.6 2.7 2.8 2.9 3.0 3.1 3.2 3.3 3.4 3.5 3.6 75 70 MAX - 32dB 30 10 355 138 MAX - 40dB 35 360 140 GAIN (dB) TA = +85°C 375 40 NOISE FIGURE (dB) 380 ICC (mA) ICC (mA) 385 TA = +85°C 45 MAX2851 toc02 150 148 390 MAX2851 toc01 152 Rx NOISE FIGURE vs. VGA GAIN SETTINGS (BALUN INPUT REFERRED) Rx MODE 5-CHANNEL SUPPLY CURRENT MAX2851 toc03 Rx MODE SINGLE-CHANNEL SUPPLY CURRENT GAIN (dB) MAX2851 5GHz, 5-Channel MIMO Receiver TA = +85°C 1.0 0.8 FBB = 19MHz TA = -20°C TA = -20°C 0.6 0.4 TA = +25°C 0.2 TA = +85°C 0 -10 0 4 6 8 12 BASEBAND VGA GAIN CODE 14 16 0 2 4 6 8 10 12 BASEBAND VGA GAIN CODE 10 ������������������������������������������������������������������������������������� www.BDTIC.com/maxim 14 16 5GHz, 5-Channel MIMO Receiver 14 10 12 LNA = MAX = -40dB LNA = MAX = -8dB -30 LNA = MAX = -16dB -35 LNA = MAX = -24dB -50 LNA = MAX = -32dB -30 -10 10 -25 -20 -15 -10 -5 Rx BASEBAND OUTPUT LEVEL (dBVRMS) Rx4 EMISSION SPECTRUM AT LNA INPUT (LNA MAX GAIN) Rx INPUT IMPEDANCE AT MAX LNA GAIN 60 MAX2851 toc13 -10 -20 50 Rx5 REAL PART (I) -40 -50 2 LO -60 4 LO -70 -80 -90 -100 0Hz 2.65GHz/div Rx1 Rx1 -2 30 Rx2, 3, 4 20 Rx5 0 -4 TA = -40°C -6 TA = +25°C -8 -10 -12 -10 0 -20 -10 -30 -18 -20 -40 4.9 5.0 5.1 5.2 5.3 5.4 5.5 5.6 5.7 5.8 5.9 -20 -14 -16 TA = +85°C 4.8 5.0 5.2 5.4 5.6 5.8 RF FREQUENCY RF FREQUENCY (GHz) FREQUENCY (GHz) Rx INPUT RETURN LOSS Rx RF RSSI OUTPUT Rx RF RSSI ATTACK TIME (+40dB SIGNAL STEP) -6 -8 -10 -12 -14 Rx3 Rx5 -16 MAX2851 toc17 Rx1, 2, 4 -4 LOW GAIN, TA = +85°C 2.0 1.5 LOW GAIN, TA = +25°C -18 D: 280ns D: 1.32V @: 192ns @: 1.84V 1.0V/div LOW GAIN, TA = -20°C 0V HIGH GAIN, TA = +85°C 1.0 0.5 6.0 MAX2851 toc18 2.5 RF RSSI OUTPUT VOLTAGE (V) -2 MAX2851 toc16 0 10 0 40 10 2.65GHz 5 Rx3 INPUT RETURN LOSS MAX2851 toc14 10 Rx2, 3, 4 0 INPUT POWER (dBm) 30 20 -40 -35 -30 -25 -20 -15 -10 -5 0 IMAGINARY PART (I) 40 -30 40MHz OFFSET 0 -30 INPUT POWER (dBm) 0 6 2 S11 (dB) -70 8 4 0 -90 OUTPUT POWER (dBm) VGA GAIN = 3/5/7/9/11/13/15 2 -40 S11 (dB) 6 4 20MHz OFFSET 10 8 Rx EVM (%) Rx EVM (%) Rx EVM (dB) VGA GAIN = 0 -25 MAX2851 toc12 -20 VGA GAIN = 2/4/6/8/10/12/14 MAX2851 toc15 LNA = MAX MAX2851 toc11 12 MAX2851 toc10 -15 GAIN CONTROL 1.0V/div HIGH GAIN, TA = +25°C 0V VRSSI HIGH GAIN, TA = -20°C 0 -20 4.8 5.0 5.2 5.4 5.6 FREQUENCY (GHz) 5.8 6.0 -50 -45 -40 -35 -30 -25 -20 -15 -10 -5 0 400ns/div RF INPUT POWER (dBm) ______________________________________________________________________________________ 11 www.BDTIC.com/maxim MAX2851 Typical Operating Characteristics (continued) (VCC = 2.8V, TA = +25NC, fLO = 5.35GHz, fREF = 40MHz, CS = high, SCLK = DIN = low, RF BW = 20MHz, Tx output at 50ω unbalanced output of balun, using the MAX2851 Evaluation Kit, unless otherwise noted.) Rx EVM vs. OFDM JAMMER POWER AT Rx EVM vs. Rx BASEBAND Rx EVM vs. INPUT POWER 20MHz AND 40MHz OFFSET FREQUENCY OUTPUT LEVEL (CHANNEL BANDWIDTH = 20MHz) WITH WANTED SIGNAL AT -66dBm Typical Operating Characteristics (continued) (VCC = 2.8V, TA = +25NC, fLO = 5.35GHz, fREF = 40MHz, CS = high, SCLK = DIN = low, RF BW = 20MHz, Tx output at 50ω unbalanced output of balun, using the MAX2851 Evaluation Kit, unless otherwise noted.) Rx RF RSSI DELAY TIME (-40dB SIGNAL STEP) GAIN CONTROL 0V VRSSI 1.0V/div 0V MAX2851 toc21 LNA = MAX 2.5 MAX2851 toc20 3.0 BASEBAND RSSI OUTPUT VOLTAGE (V) 1.0V/div Rx BASEBAND RSSI +40dB STEP RESPONSE BASEBAND RSSI VOLTAGE vs. INPUT POWER MAX2851 toc19 D: 216ns D: 1.30V @: 128ns @: 460mV LNA = MAX - 40dB LNA = MAX - 8dB 2.0 D: 460ns D: 1.50V @: 440ns @: 2.30V 2.7V 0V 2.4V 1.5 LNA GAIN CONTROL 0.8V LNA = MAX - 24dB 1.0 RSSI OUTPUT LNA = MAX - 32dB 0.5 LNA = MAX - 16dB 0 400ns/div -100 -80 -60 -40 -20 0 1µs/div 20 RF INPUT POWER (dBm) Rx LPF 20MHz CHANNEL BANDWIDTH RESPONSE -35 D: 1.18µs D: 1.62V @: 1.16µs @: 480mV LNA GAIN CONTROL 0.6V RSSI OUTPUT -135 1µs/div -35 RESPONSE (dB) RESPONSE (dB) 2.7V 0V 2.0V Rx LPF 40MHz CHANNEL BANDWIDTH RESPONSE MAX2851 toc24 MAX2851 toc22 MAX2851 toc23 Rx BASEBAND RSSI -32dB STEP RESPONSE -135 10k 100M 10k BASEBAND FREQUENCY (Hz) MAX2851 toc25 100 Rx DC OFFSET SETTLING RESPONSE (-30dB Rx VGA GAIN STEP) MAX2851 toc26 100 100M FREQUENCY (Hz) Rx LPF 40MHz CHANNEL BANDWIDTH GROUP DELAY Rx LPF 20MHz CHANNEL BANDWIDTH GROUP DELAY MAX2851 toc27 GAIN-CONTROL TOGGLE 0V Rx BASEBAND I/Q OUTPUT 50mV/div GROUP DELAY (ns) GROUP DELAY (ns) MAX2851 5GHz, 5-Channel MIMO Receiver 0 0 10k 100M 10k FREQUENCY (Hz) 100M 200ns/div FREQUENCY (Hz) 12 ������������������������������������������������������������������������������������� www.BDTIC.com/maxim CH1 PEAK TO PEAK: 81.9mV 5GHz, 5-Channel MIMO Receiver Rx DC OFFSET SETTLING RESPONSE (+8dB Rx VGA GAIN STEP) Rx DC OFFSET SETTLING RESPONSE (+16dB Rx VGA GAIN STEP) MAX2851 toc28 0V MAX2851 toc29 CH1 PEAK TO PEAK: 8.60mV GAIN-CONTROL TOGGLE Rx DC OFFSET SETTLING RESPONSE (+32dB Rx VGA GAIN STEP) 0V 10mV/div 10mV/div Rx BASEBAND I/Q OUTPUT Rx BASEBAND I/Q OUTPUT MAX2851 toc30 GAIN-CONTROL TOGGLE CH1 PEAK TO PEAK: 17.3mV GAIN-CONTROL TOGGLE 0V Rx BASEBAND I/Q OUTPUT 50mV/div 200ns/div 200ns/div 200ns/div Rx BASEBAND DC OFFSET SETTLING RESPONSE WITH RxHP = 1 (MAX - 40dB TO MAX LNA GAIN STEP) Rx BASEBAND DC OFFSET SETTLING RESPONSE WITH RxHP = 0 (MAX TO MAX - 40dB LNA GAIN STEP) Rx BASEBAND DC OFFSET SETTLING RESPONSE WITH RxHP = 1 (MAX - 40dB TO MAX LNA GAIN STEP) MAX2851 toc31 MAX2851 toc32 GAIN-CONTROL TOGGLE MAX2851 toc33 GAIN-CONTROL TOGGLE GAIN-CONTROL TOGGLE Rx BASEBAND I/Q OUTPUT 0V 10mV/div Rx BASEBAND I/Q OUTPUT 0V 10mV/div Rx BASEBAND I/Q OUTPUT 0V 50mV/div 10µs/div 10µs/div 10µs/div Rx BASEBAND DC OFFSET SETTLING RESPONSE WITH RxHP = 0 (MAX - 40dB TO MAX LNA GAIN STEP) Rx BASEBAND VGA SETTLING RESPONSE (-30dB BASEBAND VGA GAIN STEP) Rx BASEBAND VGA SETTLING RESPONSE (+4dB BASEBAND VGA GAIN STEP) MAX2851 toc35 MAX2851 toc34 MAX2851 toc36 GAIN-CONTROL TOGGLE CH1 PEAK TO PEAK: 652mV Rx BASEBAND I/Q OUTPUT 0V CH1 PEAK TO PEAK: 69.0mV GAIN-CONTROL TOGGLE 50mV/div Rx BASEBAND I/Q OUTPUT 0V GAIN-CONTROL TOGGLE 0.1V/div 10µs/div CH1 PEAK TO PEAK: 568mV Rx BASEBAND OUTPUT 0V 0.1V/div 100ns/div 100ns/div ______________________________________________________________________________________ 13 www.BDTIC.com/maxim MAX2851 Typical Operating Characteristics (continued) (VCC = 2.8V, TA = +25NC, fLO = 5.35GHz, fREF = 40MHz, CS = high, SCLK = DIN = low, RF BW = 20MHz, Tx output at 50ω unbalanced output of balun, using the MAX2851 Evaluation Kit, unless otherwise noted.) MAX2851 5GHz, 5-Channel MIMO Receiver Typical Operating Characteristics (continued) (VCC = 2.8V, TA = +25NC, fLO = 5.35GHz, fREF = 40MHz, CS = high, SCLK = DIN = low, RF BW = 20MHz, Tx output at 50ω unbalanced output of balun, using the MAX2851 Evaluation Kit, unless otherwise noted.) Rx BASEBAND VGA SETTLING RESPONSE (+16dB BASEBAND VGA GAIN STEP) Rx BASEBAND VGA SETTLING RESPONSE (+30dB BASEBAND VGA GAIN STEP) MAX2851 toc37 MAX2851 toc38 CH1 PEAK TO PEAK: 532mV Rx BASEBAND OUTPUT 0V GAIN-CONTROL TOGGLE MAX2851 toc39 D: 130mv @: 132mv CH1 PEAK TO PEAK: 800mV CLIPPING NEGATIVE Rx BASEBAND OUTPUT 0V 0.1V/div Rx LNA SETTLING RESPONSE (MAX TO MAX - 40dB GAIN STEP) CH1 RMS: 168mV GAIN-CONTROL TOGGLE GAIN-CONTROL TOGGLE 0V 0.1V/div 0.1V/div Rx BASEBAND OUTPUT 100ns/div 100ns/div 100ns/div Rx LNA SETTLING RESPONSE (MAX - 8dB TO MAX GAIN STEP) Rx LNA SETTLING RESPONSE (MAX - 16dB TO MAX GAIN STEP) Rx LNA SETTLING RESPONSE (MAX - 24dB TO MAX GAIN STEP) MAX2851 toc40 MAX2851 toc41 MAX2851 toc42 CH1 RMS: 176mV GAIN-CONTROL TOGGLE CH1 RMS: 174mV GAIN-CONTROL TOGGLE Rx BASEBAND OUTPUT 0V Rx BASEBAND OUTPUT Rx BASEBAND OUTPUT 0V 0V 0.1V/div 0.1V/div 0.1V/div GAIN-CONTROL TOGGLE D: 130mv @: 132mv D: 130mv @: 132mv CH1 RMS: 188mV D: 130mv @: 132mv 100ns/div 100ns/div Rx LNA SETTLING RESPONSE (MAX - 32dB TO MAX GAIN STEP) Rx LNA SETTLING RESPONSE (MAX - 40dB TO MAX GAIN STEP) MAX2851 toc43 100ns/div MAX2851 toc44 CH1 RMS: 155mV CH1 RMS: 154mV HISTOGRAM: Rx I/Q GAIN IMBALANCE MAX2851 toc45 648 540 Rx BASEBAND OUTPUT GAIN-CONTROL TOGGLE Rx BASEBAND OUTPUT 0V 0V 0.1V/div 0.1V/div GAIN-CONTROL TOGGLE 324 216 108 D: 130mv @: 132mv D: 130mv @: 132mv 200ns/div 432 0 200ns/div -800.00m 0 800.00m SAMPLES = 3413, AVG = -0.015dB, STDEV = 0.042dB 14 ������������������������������������������������������������������������������������� www.BDTIC.com/maxim 5GHz, 5-Channel MIMO Receiver MAX2851 toc46 180 POWER-ON DC OFFSET CANCELLATION WITH INPUT SIGNAL HISTOGRAM: Rx STATIC DC OFFSET HISTOGRAM: Rx I/Q PHASE IMBALANCE MAX2851 toc47 132 150 110 120 88 90 66 60 44 30 22 MAX2851 toc48 D: 2.14µs D: 112mV @: 2.12µs @: 104mV Rx ENABLE 0V 2V/div Rx BASEBAND OUTPUT 0V 0.1V/div ENGAGE 600kHz HIGHPASS CORNER 0 -2.0000 0 2.0000 SAMPLES = 3413, AVG = -0.15deg, STDEV = 0.18deg -15.000m 0 15.000m SAMPLES = 3413, AVG = -0.5mV, STDEV = 2.14mV POWER-ON DC OFFSET CANCELLATION WITHOUT INPUT SIGNAL Rx CHANNEL ISOLATION MAX2851 toc49 80 Rx ENABLE 70 Rx3 TO Rx4 Rx5 TO Rx4 60 TURN-ON TRANSIENT RXBBQ_ 500mV/div ISOLATION (dB) RXBBI_ 50mV/div 1µs/div MAX2851 toc50 0 50 40 30 Rx4 TO Rx5 20 Rx1 TO Rx2 Rx2 TO Rx3 5900 5800 5700 5600 5500 5400 5300 5200 5100 5000 0 400ns/div 4900 10 fLO (MHz) ______________________________________________________________________________________ 15 www.BDTIC.com/maxim MAX2851 Typical Operating Characteristics (continued) (VCC = 2.8V, TA = +25NC, fLO = 5.35GHz, fREF = 40MHz, CS = high, SCLK = DIN = low, RF BW = 20MHz, Tx output at 50ω unbalanced output of balun, using the MAX2851 Evaluation Kit, unless otherwise noted.) Typical Operating Characteristics (continued) (VCC = 2.8V, TA = +25NC, fLO = 5.35GHz, fREF = 40MHz, CS = high, SCLK = DIN = low, RF BW = 20MHz, Tx output at 50ω unbalanced output of balun, using the MAX2851 Evaluation Kit, unless otherwise noted.) TRANSMITTER OUTPUT RETURN LOSS AT TA = +25°C vs. Tx CHANNELS 178 TA = +25°C 176 TA = -40°C Tx2 -15 MAX2851 toc53 MAX2851 toc52s -10 Tx3 TA = -20°C -3 TA = +25°C -4 -5 -6 -7 Tx1 TA = +85°C -2 -3 5800 5900 5700 5600 5500 5400 5300 5200 MAX2851 toc55 -5 TA = +85°C -10 5500 5700 -15 -20 TA = +85°C -25 TA = +25°C -30 10 20 60 -0.5 -0.6 -0.8 70 TA = +85°C -36 10 0 20 30 40 50 60 70 Tx GAIN CODE TA = -20°C 0 OUTPUT POWER (dBm) TA = -20°C -34 30 40 50 Tx GAIN CODE 2 MAX2851 toc57 TA = +25°C -32 -0.4 Tx2 OUTPUT SPECTRUM AT -5dBM (20MHz CHANNEL BANDWIDTH, 802.11a 54Mbps) Tx MAX OUTPUT POWER MEETING -33dBc EVM AND 802.11a SPECTRAL MASK Tx EVM vs. OUTPUT POWER (100mVRMS 54Mbps WLAN SIGNAL) -30 TA = -20°C TA = +85°C FREQUENCY (MHz) -28 5.9 -0.7 0 5900 5.7 TA = -20°C -18 MAX2851 toc58 5300 TA = +25°C -0.3 -40 -5 5.5 Tx GAIN STEP vs. GAIN SETTING -35 5100 5.3 -0.2 GAIN STEP (dB) TA = -20°C 4900 5.1 Tx OUTPUT POWER vs. GAIN SETTING OUTPUT POWER (dBm) 0 -4 4.9 FREQUENCY (GHz) 0 MAX2851 toc54 1 TA = +25°C -9 FREQUENCY (MHz) Tx OUTPUT POWER vs. FREQUENCY AT MAXIMUM GAIN -1 5100 VCC (V) 5000 -25 2.6 2.7 2.8 2.9 3.0 3.1 3.2 3.3 3.4 3.5 3.6 4900 -8 172 OUTPUT POWER (dBm) -2 Tx4 -20 174 -1 MAX2851 toc59 TA = +85°C 0 RETURN LOSS (dB) 180 -5 RETURN LOSS (dB) 182 ICC (mA) 0 MAX2851 toc51 184 Tx OUTPUT RETURN LOSS vs. FREQUENCY MAX2851 toc56 Tx MODE SUPPLY CURRENT Tx EVM (dB) MAX2851 5GHz, 5-Channel MIMO Receiver 0dBr -28 -38 -48 -2 10dB/div TA = +25°C -4 TA = +85°C -40dBr -58 -68 -78 -6 -88 -38 -40 -35 -30 -25 -20 -15 -10 OUTPUT POWER (dBm) -5 0 -98 -8 4900 5100 5300 5500 FREQUENCY (MHz) 5700 5900 5300 5350 RF FREQUENCY (MHz) 16 ������������������������������������������������������������������������������������� www.BDTIC.com/maxim 5400 5GHz, 5-Channel MIMO Receiver -45 -50 -55 MAX2851 toc62 TA = -20°C TA = +85°C TA = +25°C -35 TA = -20°C -45 0 5900 5800 5700 5600 70 RF FREQUENCY (MHz) Tx6 OUTPUT EMISSION SPECTRUM AT MAX GAIN AND COLD (100mVRMS 802.11A 54Mbps SIGNAL) LO -10 OUTPUT POWER (dBm/MHz) MAX2851 toc63 -25 60 5500 30 40 50 Tx GAIN CODE 5400 20 5300 10 MAX2851 toc64 5900 5800 5700 5600 5500 5400 5300 5200 5100 5000 0 Tx UNWANTED SIDEBAND vs. GAIN SETTING UNWANTED SIDEBAND (dBc) 4900 -65 -65 RF FREQUENCY (MHz) -40 TA = +25°C -55 -60 -60 -30 -50 5200 -60 -65 TA = +25°C -45 5000 -55 -40 TA = +85°C -40 4900 TA = +85°C TA = +25°C TA = -20°C -35 -35 UNWANTED SIDEBAND (dBc) -45 TA = +85°C -30 CARRIER LEAKAGE (dBc) -40 MAX2859 toc61 TA = -20°C CARRIER LEAKAGE (dBc) -25 MAX2851 toc60 -35 -50 Tx UNWANTED SIDEBAND vs. RF FREQUENCY Tx CARRIER LEAKAGE vs. GAIN SETTING 5100 Tx CARRIER LEAKAGE vs. RF FREQUENCY -20 -30 -40 2 LO -50 3 LO -60 4 LO -70 -80 -90 -100 -50 0 10 20 30 40 50 60 0Hz 70 Tx GAIN CODE MAX2851 toc65 156 85 130 68 104 51 78 34 52 17 26 0 26.5 HISTOGRAM: SIDEBAND SUPPRESSION HISTOGRAM: CARRIER SUPPRESSION 102 2.65GHz/div RF FREQUENCY (GHz) MAX2851 toc66 0 -50.000 -34.000 -18.000 SAMPLES = 3413, AVG = -34.9dBc, STDEV = 3.61dB -62.000 -44.000 -26.000 SAMPLES = 3413, AVG = -44.6dBc, STDEV = 2.58dB ______________________________________________________________________________________ 17 www.BDTIC.com/maxim MAX2851 Typical Operating Characteristics (continued) (VCC = 2.8V, TA = +25NC, fLO = 5.35GHz, fREF = 40MHz, CS = high, SCLK = DIN = low, RF BW = 20MHz, Tx output at 50ω unbalanced output of balun, using the MAX2851 Evaluation Kit, unless otherwise noted.) Typical Operating Characteristics (continued) (VCC = 2.8V, TA = +25NC, fLO = 5.35GHz, fREF = 40MHz, CS = high, SCLK = DIN = low, RF BW = 20MHz, Tx output at 50ω unbalanced output of balun, using the MAX2851 Evaluation Kit, unless otherwise noted.) SYNTHESIZER ICC (mA) 4.5 4.0 TA = +25°C 6.0 5.0 TA = +85°C 5.5 TA = +85°C 5.0 TA = -40°C 3.5 MAX2851 toc69 6.5 TA = +25°C 6.5 LO FREQUENCY (GHz) 5.5 7.0 MAX2851 toc68 7.0 MAX2851 toc67 6.0 LO FREQUENCY vs. DIFFERENTIAL TUNE VOLTAGE AT TA = +25°C CLKOUT2 MODE SUPPLY CURRENT CLKOUT MODE SUPPLY CURRENT ICC (mA) 6.0 5.5 5.0 4.5 4.5 TA = -40°C 4.0 4.0 3.0 2.6 2.7 2.8 2.9 3.0 3.1 3.2 3.3 3.4 3.5 3.6 2.6 2.7 2.8 2.9 3.0 3.1 3.2 3.3 3.4 3.5 3.6 VCC (V) VCC (V) 0.5 1.0 1.5 LO PHASE NOISE AT 5350MHz AND ROOM TEMPERATURE -60 -70 PHASE NOISE (dBc/Hz) 500 400 300 200 MAX2851 toc71 -50 MAX2851 toc70 600 -80 -90 -100 -110 -120 -130 100 -140 -150 0 0 0.5 1.0 1.5 2.0 1k 2.5 10M DIFFERENTIAL TUNE VOLTAGE (V) OFFSET FREQUENCY (Hz) LO PHASE NOISE AT 5900MHz AND HOT TEMPERATURE CHANNEL SWITCHING FREQUENCY SETTLING (4900MHz TO 5900MHz, AUTOMATIC VCO SUB-BAND SELECTION) MAX2851 toc72 -50 -60 FREQUENCY (5kHz/div) -70 25kHz MAX2851 toc73 LO GAIN (MHz/V) 0 -80 -90 -100 -110 -120 -130 -140 -150 1k 10M OFFSET FREQUENCY (Hz) 2.0 DIFFERENTIAL TUNE VOLTAGE (V) LO GAIN vs. DIFFERENTIAL TUNE VOLTAGE AT TA = +25°C PHASE NOISE (dBc/Hz) MAX2851 5GHz, 5-Channel MIMO Receiver -25kHz 0s 3.99ms 400µs/div 18 ������������������������������������������������������������������������������������� www.BDTIC.com/maxim 2.5 5GHz, 5-Channel MIMO Receiver CHANNEL SWITCHING FREQUENCY SETTLING (5900MHz TO 4900MHz, AUTOMATIC VCO SUB-BAND SELECTION) FREQUENCY (5kHz/div) FREQUENCY (5kHz/div) -25kHz -25kHz 0s -25kHz 0s 3.99ms 25kHz MAX2851 toc76 MAX2851 toc75 25kHz CHANNEL SWITCHING FREQUENCY SETTLING (5900MHz TO 4900MHz, MANUAL VCO SUB-BAND SELECTION) FREQUENCY (5kHz/div) MAX2851 toc74 25kHz CHANNEL SWITCHING FREQUENCY SETTLING (4900MHz TO 5900MHz, MANUAL VCO SUB-BAND SELECTION) 99.22µs 0s 99.22µs 400µs/div 10µs/div 10µs/div Tx-TO-Rx TURNAROUND FREQUENCY SETTLING AT MAX Tx POWER Rx-TO-Tx TURNAROUND FREQUENCY SETTLING AT MAX Tx POWER CRYSTAL OSCILLATOR TUNING RANGE WITH KYOCERA 40MHz 2520 CRYSTAL -50kHz 49.84µs 0s MAX2851 toc79 60 40 TA = +25°C 20 TA = +85°C 0 -20 -40 TA = -20°C -60 -80 0 49.84µs 5µs/div 50 5µs/div 1.5 1.0 0.5 0 200 250 300 MAX2851 toc81 140 CAPACITANCE AT BASE AND EMITTER (pF) 2.0 150 CRYSTAL OSCILLATOR TUNING CAPACITANCE AT BASE AND EMITTER (INCLUDE EV KIT COMPONENTS) MAX2851 toc80 2.5 100 CRYSTAL TUNING CODE CRYSTAL OSCILLATOR TUNING STEP WITH KYOCERA 2520 40MHz CRYSTAL CRYSTAL OSCILLATOR FREQUENCY TUNING STEP (ppm) 80 -100 -50kHz 0s 100 FREQUENCY DEVIATION FROM 40MHz (ppm) MAX2851 toc78 50kHz FREQUENCY ERROR (10kHz/div) FREQUENCY ERROR (10kHz/div) MAX2851 toc77 50kHz 120 EMITTER-TO-GROUND CAPACITANCE 100 80 BASE-TO-GROUND CAPACITANCE 60 40 20 0 -0.5 0 50 100 150 200 CRYSTAL TUNING CODE 250 300 0 50 100 150 200 250 300 CRYSTAL TUNING CODE ______________________________________________________________________________________ 19 www.BDTIC.com/maxim MAX2851 Typical Operating Characteristics (continued) (VCC = 2.8V, TA = +25NC, fLO = 5.35GHz, fREF = 40MHz, CS = high, SCLK = DIN = low, RF BW = 20MHz, Tx output at 50ω unbalanced output of balun, using the MAX2851 Evaluation Kit, unless otherwise noted.) VCC_XTAL XTAL XTAL_CAP RSSI RXBBI2+ RXBBI2- RXBB2Q+ RXBB2Q- VCC_BB1 RXBBI1+ RXBBI1- RXBBQ1+ RXBBQ1- RXRF1+ VCC_LNA1 ENABLE TOP VIEW RXRF1- Pin Configuration 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 GND 1 51 CLKOUT VCC_LNA2 2 50 CLKOUT2 RXRF2- 3 49 DOUT RXRF2+ 4 48 VCC_DIG VCC_MXR1 5 47 CPOUT- VCC_LNA3 6 46 CPOUT+ RXRF3- 7 45 GND_VCO RXRF3+ 8 44 BYP_VCO VCC_MXR2 9 43 VCC_VCO MAX2851 PA_DET 10 42 RXBBQ3- RXRF4- 11 41 RXBBQ3+ RXRF4+ 12 40 RXBBI3- VCC_LNA4 13 39 RXBBI3+ 38 DIN PA_BIAS 14 TXRF+ 15 37 SCLK *EP TXRF- 16 36 CS 35 RXBBQ4- VCC_PA_BIAS 17 RXBBQ4+ RXBBI4- RXBBI4+ TXBBQ- TXBBQ+ TXBBI- TXBBI+ RXBBQ5- RXBBI5- RXBBQ5+ RXBBI5+ GND VCC_BB2 RXRF5+ RXRF5- VCC_LNA5 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 VCC_UCX MAX2851 5GHz, 5-Channel MIMO Receiver TQFN *EXPOSED PAD. 20 ������������������������������������������������������������������������������������� www.BDTIC.com/maxim 5GHz, 5-Channel MIMO Receiver PIN NAME 1, 22 GND 2 VCC_LNA2 3 RXRF2- 4 RXRF2+ FUNCTION Ground Receiver 2 LNA Supply Voltage. Bypass with a capacitor as close as possible to the pin. Receiver 2 LNA Differential Input. Input is DC-coupled and biased internally at 1.2V. 5 VCC_MXR1 Receiver Downconverter Supply Voltage 1. Bypass with a capacitor as close as possible to the pin. 6 VCC_LNA3 Receiver 3 LNA Supply Voltage. Bypass with a capacitor as close as possible to the pin. 7 RXRF3- 8 RXRF3+ 9 VCC_MXR2 10 PA_DET 11 RXRF4- 12 RXRF4+ Receiver 3 LNA Differential Input. Input is DC-coupled and biased internally at 1.2V. Receiver Downconverter Supply Voltage 2. Bypass with a capacitor as close as possible to the pin. External Power-Amplifier Detector Mux Input Receiver 4 LNA Differential Input. Input is DC-coupled and biased internally at 1.2V. 13 VCC_LNA4 Receiver 4 LNA Supply Voltage. Bypass with a capacitor as close as possible to the pin. 14 PA_BIAS External Power-Amplifier Voltage Bias Output 15 TXRF+ 16 TXRF- Transmitter Differential Output. These pins are in open-collector configuration. These pins should be biased at the supply voltage with differential impedance terminated at 300I. BIAS External Power-Amplifier Voltage Bias and Detector Mux Supply Voltage. Bypass with a capacitor as close as possible to the pin. 18 VCC_UCX Transmitter Upconverter Supply Voltage. Bypass with a capacitor as close as possible to the pin. 19 VCC_LNA5 Receiver 5 LNA Supply Voltage. Bypass with a capacitor as close as possible to the pin. 17 VCC_PA_ 20 RXRF5- 21 RXRF5+ 23 VCC_BB2 24 RXBBI5+ 25 RXBBI5- 26 RXBBQ5+ 27 RXBBQ5- 28 TXBBI+ 29 TXBBI- 30 TXBBQ+ 31 TXBBQ- 32 RXBBI4+ 33 RXBBI4- 34 RXBBQ4+ 35 RXBBQ4- 36 37 CS SCLK 38 DIN 39 RXBBI3+ 40 RXBBI3- 41 RXBBQ3+ 42 RXBBQ3- Receiver 5 LNA Differential Input. Input is DC-coupled and biased internally at 1.2V. Receiver Baseband Supply Voltage 2. Bypass with a capacitor as close as possible to the pin. Receiver 5 Baseband I-Channel Differential Output Receiver 5 Baseband Q-Channel Differential Output Transmitter Baseband I-Channel Differential Input Transmitter Baseband Q-Channel Differential Input Receiver 4 Baseband I-Channel Differential Output Receiver 4 Baseband Q-Channel Differential Output Active-Low Chip-Select Logic Input of 4-Wire Serial Interface Serial-Clock Logic Input of 4-Wire Serial Interface Data Logic Input of 4-Wire Serial Interface Receiver 3 Baseband I-Channel Differential Output Receiver 3 Baseband Q-Channel Differential Output ______________________________________________________________________________________ 21 www.BDTIC.com/maxim MAX2851 Pin Description MAX2851 5GHz, 5-Channel MIMO Receiver Pin Description (continued) PIN NAME 43 VCC_VCO VCO Supply Voltage. Bypass with a capacitor as close as possible to the pin. FUNCTION 44 BYP_VCO On-Chip VCO Regulator Output Bypass. Bypass with an external 1FF capacitor to GND_VCO with minimum PCB trace. Do not connect other circuitry to this pin. 45 GND_VCO 46 CPOUT+ VCO Ground 47 CPOUT- Differential Charge-Pump Output. Connect the frequency synthesizer’s loop filter between CPOUT+ and CPOUT- (see the Typical Operating Circuit). 48 VCC_DIG Digital Block Supply Voltage. Bypass with a capacitor as close as possible to the pin. 49 DOUT 50 CLKOUT2 51 CLKOUT Reference Clock Buffer Output 52 VCC_XTAL Crystal Oscillator Supply Voltage. Bypass with a capacitor as close as possible to the pin. 53 XTAL 54 XTAL_CAP 55 RSSI 56 RXBBI2+ 57 RXBBI2- 58 RXBBQ2+ 59 RXBBQ2- 60 VCC_BB1 61 RXBBI1+ 62 RXBBI1- 63 RXBBQ1+ 64 RXBBQ1- 65 VCC_LNA1 66 RXRF1+ 67 RXRF1- 68 ENABLE — EP Data Logic Output of 4-Wire Serial Interface Reference Clock Buffer Output 2 Crystal Oscillator Base Input. AC-couple crystal unit to this pin. Crystal Oscillator Emitter Node Receiver Signal Strength Indicator Output Receiver 2 Baseband I-Channel Differential Output Receiver 2 Baseband Q-Channel Differential Output Receiver Baseband Supply Voltage 1. Bypass with a capacitor as close as possible to the pin. Receiver 1 Baseband I-Channel Differential Output Receiver 1 Baseband Q-Channel Differential Output Receiver 1 LNA Supply Voltage. Bypass with a capacitor as close as possible to the pin. Receiver 1 LNA Differential Input. Input is DC-coupled and biased internally at 1.2V. Enable Logic Input Exposed Paddle. Connect to the ground plane with multiple vias for proper operation and heat dissipation. Do not share with any other pin grounds and bypass capacitors’ ground. 22 ������������������������������������������������������������������������������������� www.BDTIC.com/maxim 5GHz, 5-Channel MIMO Receiver MODE CONTROL LOGIC INPUTS MODE CIRCUIT BLOCK STATES ENABLE Pin SPI Main Address 0, D[4:2] Rx Path Tx Path (Note 1) LO Path Clkout (Notes 2, 3) Calibration sections on SHUTDOWN 0 XXX Off Off Off Off None CLOCKOUT 1 000 Off Off Off On None STANDBY 1 001 Off Off On On None Rx 1 010 On Off On On None Tx 1 011 Off On On On None Tx CALIBRATION 1 100 Off On On On AM detector + Rx5 I/Q buffers RF LOOPBACK 1 101 On (except LNA) On On On RF loopback BASEBAND LOOPBACK 1 11X On (except RXRF) Off On On Tx baseband buffer Note 1: PA_BIAS pin can be kept active in nontransmit mode(s) by SPI programming. Note 2: CLKOUT signal is active independent of SPI, and is only dependent on the ENABLE pin. Note 3: CLKOUT2 signal can be enabled/disabled through SPI in all operating modes except shutdown mode. Detailed Description Modes of Operation The MAX2851 modes of operation are shutdown, clockout, standby, receive, transmit, transmitter calibration, RF loopback, and baseband loopback. See Table 1 for a summary of the modes of operation. The logic input pin ENABLE (pin 68) and SPI Main address 0 D[4:2] control the various modes. Shutdown Mode The MAX2851 features a low-power shutdown mode. All circuit blocks are powered down, except the 4-wire serial bus and its internal programmable registers. Clockout Mode In clockout mode, only the crystal oscillator signal is active at the CLKOUT pin. The rest of the transceiver is powered down. Standby Mode In standby mode, PLL, VCO, and LO generation are on. Tx or Rx modes can be quickly enabled from this mode. Other blocks can be selectively enabled in this mode Receive (Rx) Mode In receive mode, all Rx circuit blocks are powered on and active. The antenna signal is applied; RF is downconverted, filtered, and buffered at the RXBB I and Q outputs. Transmit (Tx) Mode In transmit mode, all Tx circuit blocks are powered on and active. The external PA can be powered on through the PA_BIAS pin after a programmable delay. Transmit Calibration Mode In transmit calibration mode, all Tx circuit blocks are powered on and active. The AM detector and receiver I/Q channel buffers are also on. Output signals are routed to RXBB I and Q outputs. The AM detector multiplies the Tx RF output signal with itself. The self-mixing product of the wanted sideband becomes DC voltage and is filtered on-chip. The mixing product between wanted sideband and the carrier leakage forms Ftone at the Rx baseband output. The mixing product between the wanted sideband and the unwanted sideband forms 2Ftone at the Rx baseband output. As the Tx RF output is self-mixed at the AM detector, the AM detector output responds differently to different gain settings and power levels. When the Tx RF output power changes by 1dB through Tx gain control, the AM detector output changes by 2dB as both the wanted sideband and carrier leakage (or unwanted sideband) change by 1dB. When Tx RF output carrier leakage (or unwanted sideband) changes by 1dB while the wanted sideband output power is constant, the AM detector output changes by 1dB only. ______________________________________________________________________________________ 23 www.BDTIC.com/maxim MAX2851 Table 1. Operating Modes MAX2851 5GHz, 5-Channel MIMO Receiver RF Loopback Mode In RF loopback mode, part of the Rx and Tx circuit blocks except the LNA are powered on and active. The transmitter I/Q input signal is upconverted to RF, and the output of the transmitter is fed to the receiver downconverter input. Output signals are delivered to all receiver baseband I/Q outputs. The I/Q lowpass filters in the transmitter signal path are bypassed. offset settles, the user can set Main address 5 D1 = 0 to complete Rx DC-offset cancellation. Programmable Registers and 4-Wire SPI Interface The MAX2851 includes 60 programmable 16-bit registers. The most significant bit (MSB) is the read/write selection bit (R/W in Figure 1). The next 5 bits are register address (A[4:0] in Figure 1). The 10 least significant bits (LSBs) are register data (D[9:0] in Figure 1). Register data is loaded through the 4-wire SPI/MICROWIREKcompatible serial interface. MSB of data at the DIN pin is shifted in first and is framed by CS. When CS is low, the clock is active and input data is shifted at the rising edge of the clock at the SCLK pin. At CS rising edge, the 10-bit data bits are latched into the register selected by the address bits. See Figure 1. To support more than a 32-register address using a 5-bit-wide address word, the bit 0 of address 0 is used to select whether the 5-bit address word is applied to the main address or local address. There is no power-on SPI register self-reset functionality in the MAX2851; the user must program all register values after power-up. During the read mode, register data selected by address bits is shifted out to the DOUT pin at the falling edges of the clock. Baseband Loopback Mode In baseband loopback mode, part of the Rx and Tx baseband circuit blocks are powered and active. The transmitter I/Q input signal is routed to the receiver lowpass filter input. Output signals are delivered to receiver 5 baseband I/Q outputs. Power-On Sequence Set the ENABLE pin to VCC for 2ms to start the crystal oscillator. Program all SPI addresses according to recommended values. Set SPI Main address 0 D[4:2] from 000 to 001 to engage standby mode. To lock the LO frequency, the user can set SPI in order of Main address 15, Main address 16, and then Main address 17 to trigger VCO sub-band autoacquisition; the acquisition takes 2ms. After the LO frequency is locked, set SPI Main address 0 D[4:2] = 010 and 011 for Rx and Tx operating modes, respectively. Before engaging to Rx mode, set Main address 5 D1 = 1 to allow fast DC-offset settling. After engaging to Rx mode and the Rx baseband DC MICROWIRE is a trademark of National Semiconductor Corp. tCSW CS tCSO tCSH tCSS tCS1 SCLK tDS tCH tDH tCL DIN (SPI WRITE) R/W A4 A0 D9 D0 DON’T CARE DIN (SPI READ) R/W A4 A0 D9 D0 DON’T CARE tD DOUT (SPI READ) DON’T CARE D9 D0 DON’T CARE Figure 1. 4-Wire SPI Serial-Interface Timing Diagram 24 ������������������������������������������������������������������������������������� www.BDTIC.com/maxim 5GHz, 5-Channel MIMO Receiver on-default self-reset feature; the user must program all SPI addresses for normal operation. Prior to use of any untested settings, contact the factory. All values in the register definition table are typical numbers. The MAX2851 SPI does not have a power- Table 2. Register Summary REGISTER Main 0 Main 1 Main 2 READ/WRITE AND ADDRESS MAIN0_ WRITE (W)/ A[4:0] D0 READ (R) 0 0 0 00000 00001 00010 Main 4 Main 5 0 0 0 00011 00100 00101 D9 D8 0 0 W/R Default W/R Default Default R D7 D6 D5 D4 0 1 0 D3 RESERVED 0 RESERVED 0 W/R W Main 3 DATA 0 0 MODE[2:0] 0 LNA_GAIN[2:0] 1 RESERVED 1 RESERVED D2 1 0 TS_EN 0 TS_ TRIG D0 RFBW M/L_SEL 1 0 1 1 0 0 0 VGA_GAIN[4:0] 1 1 1 LNA_BAND[1:0] 1 D1 1 RESERVED 1 0 0 0 RESERVED RESERVED TS_READ[4:0] Default 0 0 0 0 0 0 0 0 0 Reserved 1 1 0 0 0 1 1 1 0 0 W/R RESERVED RESERVED RXHP RESERVED Default 0 0 0 0 W/R RSSI_MUX_SEL[2:0] 0 0 0 RSSI_RX_SEL[2:0] 0 0 0 RX_GAIN_PROG_SEL[5:1] E_RX[5:1] Main 6 0 00110 Reserved 1 1 1 1 1 1 1 1 1 1 Main 7 0 00111 Reserved 0 0 0 0 1 0 0 1 0 0 Main 8 0 01000 W/R 0 0 0 0 0 0 0 0 0 0 Main 9 0 01001 Main 10 0 01010 Main 11 0 01011 Main 13 0 01101 Main 14 Main 15 0 0 01110 01111 W/R Main 17 Main 18 0 0 0 10000 10001 10010 RESERVED Default 0 0 0 0 0 0 1 1 1 1 Reserved 0 0 0 0 0 0 0 0 0 0 Default 0 0 0 1 1 0 0 0 0 0 Reserved 0 0 0 0 0 0 0 0 0 0 W/R E_CLKOUT2 W/R Default W/R Default Main 16 TX_GAIN[5:0] RESERVED RESERVED 1 VAS_ TRIG_EN 1 0 1 1 0 0 W/R Default 0 0 0 0 SYN_CONFIG_N[6:0] 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 SYN_CONFIG_F[19:10] 1 1 1 0 W/R Default 0 RESERVED W/R Default 1 DOUT_SEL RESERVED 0 0 SYN_CONFIG_F[9:0] 0 0 0 0 0 RESERVED 0 0 XTAL_TUNE[7:0] 0 1 0 0 0 0 ______________________________________________________________________________________ 25 www.BDTIC.com/maxim MAX2851 SPI Register Definition MAX2851 5GHz, 5-Channel MIMO Receiver Table 2. Register Summary (continued) REGISTER READ/WRITE AND ADDRESS MAIN0_ WRITE (W)/ A[4:0] D0 READ (R) DATA D9 D8 D7 D6 VAS_ W/R Main 19 Main 20 0 0 RESERVED RELOCK_ SEL 10011 10100 Read RESERVED Default 0 0 0 0 1 1 Reserved Read D5 D4 VAS_ D2 D1 D0 1 1 1 0 1 0 VAS_SPI[5:0] MODE VAS_ADC[2:0] RESERVED D3 VCO_BAND[5:0] 1 0 1 1 1 1 0 1 DIE_ID[2:0] RESERVED Main 21 0 10101 Default 0 0 1 0 1 1 1 1 1 1 Main 22 0 10110 Reserved 0 1 1 0 1 1 1 0 0 0 Main 23 0 10111 Reserved 0 0 0 1 1 0 0 1 0 1 Main 24 0 11000 Reserved 1 0 0 1 0 0 1 1 1 1 Main 25 0 11001 Reserved 1 1 1 0 1 0 1 0 0 0 Main 26 0 11010 Reserved 0 0 0 0 0 1 0 1 0 1 Main 27 0 11011 0 0 W/R Default DIE_ID_ 0 VAS_VCO_ RESERVED READ 1 1 W/R RESERVED READ 0 0 0 0 RESERVED 0 PA_BIAS_DLY[3:0] Main 28 0 11100 Default 0 0 0 1 1 0 0 0 1 1 Main 29 0 11101 Reserved 0 0 0 0 0 0 0 0 0 0 Main 30 0 11110 Reserved 0 0 0 0 0 0 0 0 0 0 Main 31 0 11111 Reserved 0 0 0 0 0 0 0 0 0 0 Local 1 1 00001 Reserved 0 0 0 0 0 0 0 0 0 0 Local 2 1 00010 Reserved 0 0 0 0 0 0 0 0 0 0 Local 3 1 00011 Reserved 0 0 0 0 0 0 0 0 0 0 Local 4 1 00100 Local 5 1 Local 6 1 Local 7 W/R RFDET_MUX_SEL[2:0] RESERVED Reserved 1 1 1 0 0 0 0 0 0 0 00101 Reserved 0 0 0 0 0 0 0 0 0 0 00110 Reserved 0 0 0 0 0 0 0 0 0 0 1 00111 Reserved 0 0 0 0 0 0 0 0 0 0 Local 8 1 01000 Reserved 0 1 1 0 1 0 1 0 1 0 Local 9 1 01001 Reserved 0 1 0 0 0 1 0 1 0 0 Local 10 1 01010 Reserved 1 1 0 1 0 1 0 1 0 0 Local 11 1 01011 Reserved 0 0 0 1 1 1 0 0 1 1 Local 12 1 01100 Reserved 0 0 0 0 0 0 0 0 0 0 Local 13 1 01101 Reserved 0 0 0 0 0 0 0 0 0 0 Local 14 1 01110 Reserved 0 0 0 0 0 0 0 0 0 0 Local 15 1 01111 Reserved 0 0 0 0 0 0 0 0 0 0 Local 16 1 10000 Reserved 0 0 0 0 0 0 0 0 0 0 Local 17 1 10001 Reserved 0 0 0 0 0 0 0 0 0 0 26 ������������������������������������������������������������������������������������� www.BDTIC.com/maxim 5GHz, 5-Channel MIMO Receiver REGISTER READ/WRITE AND ADDRESS MAIN0_ WRITE (W)/ A[4:0] D0 READ (R) DATA D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Local 18 1 10010 Reserved 0 0 0 0 0 0 0 0 0 0 Local 19 1 10011 Reserved 0 0 0 0 0 0 0 0 0 0 Local 20 1 10100 Reserved 0 0 0 0 0 0 0 0 0 0 Local 21 1 10101 Reserved 0 0 0 0 0 0 0 0 0 0 Local 22 1 10110 Reserved 0 0 0 0 0 0 0 0 0 0 Local 23 1 10111 Reserved 0 0 0 0 0 0 0 0 0 0 Local 24 1 11000 Reserved 0 0 1 1 0 0 0 1 0 0 Local 25 1 11001 Reserved 0 1 0 0 1 0 1 0 1 1 Local 26 1 11010 Reserved 0 1 0 1 1 0 0 1 0 W/R RESERVED 1 TX_AMD_ TX_AMD_ BB_GAIN RF_GAIN Local 27 1 11011 Default 0 0 0 0 0 0 0 0 0 0 Local 28 1 11100 Reserved 0 0 0 0 0 0 0 1 0 0 Local 31 1 11111 Reserved 0 0 0 0 0 0 0 0 0 0 ______________________________________________________________________________________ 27 www.BDTIC.com/maxim MAX2851 Table 2. Register Summary (continued) MAX2851 5GHz, 5-Channel MIMO Receiver Table 3. Main Address 0 (A[4:0] = 00000) BIT NAME BIT LOCATION (D0 = LSB) RESERVED D[9:5] Reserved bits—set to default. MODE[2:0] D[4:2] IC operating mode select. 000 = Clockout (default) 001 = Standby 010 = Rx 011 = Tx 100 = Tx calibration 101 = RF loopback 11x = Baseband loopback RFBW D1 RF bandwidth. 0 = 20MHz 1 = 40MHz (default) M/L_SEL D0 Main or local address select. 0 = Main registers (default) 1 = Local registers DESCRIPTION Table 4. Main Address 1 (A[4:0] = 00001, Main Address 0 D0 = 0) BIT NAME BIT LOCATION (D0 = LSB) RESERVED D[9:8] Reserved bits—set to default. D[7:5] LNA gain control. Active when Rx channel is selected by corresponding RX_GAIN_PROG_SEL[5:1] bits in Main address 6 D[9:5]. 000 = Max - 40dB 001 = Max - 32dB 100 = Max - 24dB (not tested, contact factory for coverage) 101 = Max - 16dB 110 = Max - 8dB 111 = Max gain (default) D[4:0] Rx VGA gain control. Active when Rx channel is selected by corresponding RX_GAIN_PROG_SEL[5:1] bits in Main address 6 D[9:5]. 00000 = Min gain 00001 = Min + 2dB … 01110 = Min + 28dB 01111 = Min + 30dB … 1xxxx = Min + 30dB (default) LNA_GAIN[2:0] VGA_GAIN[4:0] DESCRIPTION 28 ������������������������������������������������������������������������������������� www.BDTIC.com/maxim 5GHz, 5-Channel MIMO Receiver BIT NAME BIT LOCATION (D0 = LSB) RESERVED D[9:7], D[4:0] Reserved bits—set to default. D[6:5] LNA frequency band switch. 00 = 4.9GHz~5.2GHz 01 = 5.2GHz~5.5GHz (default) 10 = 5.5GHz~5.8GHz 11 = 5.8GHz~5.9GHz LNA_BAND[1:0] DESCRIPTION Table 6. Main Address 3 (A[4:0] = 00011, Main Address 0 D0 = 0) BIT NAME BIT LOCATION (D0 = LSB) RESERVED D[9:8], D5 TS_EN D7 Temperature sensor enable. 0 = Disable (default) 1 = Enable except shutdown or clockout mode TS_TRIG D6 Temperature sensor reading trigger. 0 = Not trigger (default) 1 = Trigger temperature reading TS_READ[4:0] (Readback Only) D[4:0] DESCRIPTION Reserved bits—set to default. SPI readback only. Temperature sensor reading. Table 7. Main Address 5 (A[4:0] = 00101, Main Address 0 D0 = 0) BIT NAME BIT LOCATION (D0 = LSB) RESERVED D9, D2, D0 RSSI_MUX_SEL[2:0] D[8:6] DESCRIPTION Reserved bits—set to default. RSSI output select. 000 = Baseband RSSI (default) 001 = Do not use 010 = Do not use 011 = Do not use 100 = Rx RF detector 101 = Do not use 110 = PA power-detector mux output 111 = Do not use ______________________________________________________________________________________ 29 www.BDTIC.com/maxim MAX2851 Table 5. Main Address 2 (A[4:0] = 00010, Main Address 0 D0 = 0) MAX2851 5GHz, 5-Channel MIMO Receiver Table 7. Main Address 5 (A[4:0] = 00101, Main Address 0 D0 = 0) (continued) BIT NAME RSSI_RX_SEL[2:0] RXHP BIT LOCATION (D0 = LSB) D[5:3] D1 DESCRIPTION Baseband RSSI Rx channel select. 000 = Not select (default) 001 = Rx1 010 = Rx2 011 = Rx3 100 = Rx4 101 = Rx5 110 = Do not use 111 = Do not use Rx VGA highpass corner select after Rx turn-on. RXHP starts at 1 during Rx gain adjustment and set 0 after gain is adjusted. 0 = 10kHz highpass corner after Rx gain is adjusted (default) 1 = 600kHz highpass corner during Rx gain adjustment Table 8. Main Address 6 (A[4:0] = 00110, Main Address 0 D0 = 0) BIT NAME RX_GAIN_PROG_SEL [5:1] E_RX[5:1] BIT LOCATION (D0 = LSB) DESCRIPTION D[9:5] Rx channel gain programming select. Select which Rx channels are to be changed; gain is then determined by programming Main address 1 D[7:0]. D9 selects Rx5, D8 selects Rx4, etc. 0 = Not selected 1 = Selected 1111 = Default D[4:0] Rx MIMO channel select. Enable Rx channels independently. D4 selects Rx5, D3 selects Rx4, etc. 0 = Not selected 1 = Select in Rx, RF loopback, or Tx calibration mode 11111 = Default Table 9. Main Address 9 (A[4:0] = 01001, Main Address 0 D0 = 0) BIT LOCATION (D0 = LSB) DESCRIPTION TX_GAIN[5:0] D[9:4] Tx VGA gain control. Tx channel is selected by Main address 9 D[3:0]. 000000 = Min gain (default) … 111111 = Min gain + 31.5dB RESERVED D[3:0] Reserved bits—set to default. BIT NAME 30 ������������������������������������������������������������������������������������� www.BDTIC.com/maxim 5GHz, 5-Channel MIMO Receiver BIT NAME BIT LOCATION (D0 = LSB) E_CLKOUT2 D9 RESERVED D[8:2], D1 Reserved bits—set to default. DOUT_SEL D1 DOUT pin output select. 0 = PLL lock detect (default) 1 = SPI readback DESCRIPTION CLKOUT2 enable. 0 = Disable 1 = Enable except during shutdown mode (default) Table 11. Main Address 15 (A[4:0] = 01111, Main Address 0 D0 = 0) BIT NAME BIT LOCATION (D0 = LSB) DESCRIPTION Enable VCO sub-band acquisition triggerred by SYN_CONFIG_F[9:0] (Main address 17) programming. 0 = Disable for small frequency adjustment (i.e., ~100kHz). 1 = Enable for channel switching (default) VAS_TRIG_EN D9 RESERVED D[8:7] Reserved bits—set to default. SYN_CONFIG_N[6:0] D[6:0] Integer divide ratio. 1000010 = Default Table 12. Main Address 16 (A[4:0] = 10000, Main Address 0 D0 = 0) BIT NAME BIT LOCATION (D0 = LSB) SYN_CONFIG_F[19:10] D[9:0] DESCRIPTION Fractional divide ratio MSBs. 1110000000 = Default Table 13. Main Address 17 (A[4:0] = 10001, Main Address 0 D0 = 0) BIT NAME BIT LOCATION (D0 = LSB) SYN_CONFIG_F[9:0] D[9:0] DESCRIPTION Fractional divide ratio LSBs. 0000000000 = Default Table 14. Main Address 18 (A[4:0] = 10010, Main Address 0 D0 = 0) BIT NAME BIT LOCATION (D0 = LSB) RESERVED D[9:8] Reserved bits—set to default. D[7:0] Crystal oscillator frequency tuning. 00000000 = Min frequency 10000000 = Default 11111111 = Max frequency XTAL_TUNE[7:0] DESCRIPTION ______________________________________________________________________________________ 31 www.BDTIC.com/maxim MAX2851 Table 10. Main Address 14 (A[4:0] = 01110, Main Address 0 D0 = 0 MAX2851 5GHz, 5-Channel MIMO Receiver Table 15. Main Address 19 (A[4:0] = 10011, Main Address 0 D0 = 0) BIT NAME BIT LOCATION (D0 = LSB) RESERVED D[9:8] DESCRIPTION Reserved bits—set to default. VAS_RELOCK_SEL D7 VAS relock select. 0 = Start at sub-band selected by VAS_SPI[5:0] (Main address 19 D5:D0) (default) 1 = Start at current sub-band VAS_MODE D6 VCO sub-band select. 0 = By VAS_SPI[5:0] (Main address 19 D[5:0]) 1 = By on-chip VCO autoselect (VAS) (default) D[5:0] VCO autoselect sub-band input. Select VCO subband when VAS_ MODE (Main address 19 D6) = 0. Select initial VCO sub-band for autoacquisition when VAS_MODE = 1. 000000 = Min frequency sub-band … 011111 = Default … 111111 = Max frequency sub-band VAS_ADC[2:0] (Readback Only) D[8:6] Read VCO autoselect tune voltage ADC output. Active when VAS_ VCO_READ (Main address 27 D5) = 1. 000 = Lower than lock range and at risk of unlock 001 = Lower than acquisition range and maintain lock 010 or 101 = Within acquisition range and maintain lock 110 = Higher than acquisition range and maintain lock 111 = Higher than lock range and at risk of unlock VCO_BAND[5:0] (Readback Only) D[5:0] Read the current acquired VCO sub-band by VCO autoselect. Active when VAS_VCO_READ (Main address 27 D5) = 1. VAS_SPI[5:0] Table 16. Main Address 21 (A[4:0] = 10101, Main Address 0 D0 = 0) BIT NAME BIT LOCATION (D0 = LSB) RESERVED D[9:8], D[4:0] DIE_ID[2:0] (Readback Only) D[7:5] DESCRIPTION Reserved bits—set to default. Read revision ID at Main address 21 D[7:5]. Active when DIE_ID_READ (Main address 27 D9) = 1. 000 = Pass1 001 = Pass2 … 32 ������������������������������������������������������������������������������������� www.BDTIC.com/maxim 5GHz, 5-Channel MIMO Receiver BIT NAME BIT LOCATION (D0 = LSB) DIE_ID_READ D9 RESERVED D[8:6], D[4:0] VAS_VCO_READ D5 DESCRIPTION Die ID readback select. 0 = Main address 21 D[9:0] reads its own values (default) 1 = Main address 21 D[7:5] reads revision ID Reserved bits—set to default. VAS ADC and VCO sub-band readback select. 0 = Main address 19 D[9:0] reads its own values (default) 1 = Main address 19 D[8:6] reads VAS_ADC[2:0]; Main address 19 D[5:0] reads VCO_BAND[5:0] Table 18. Main Address 28 (A[4:0] = 11100, Main Address 0 D0 = 0) BIT NAME BIT LOCATION (D0 = LSB) RESERVED D[9:4] Reserved bits—set to default. D[3:0] PA_BIAS turn-on delay. 0000 = 0Fs 0001 = 0Fs 0010 = 0.5Fs 0011 = 1.0Fs (default) … 1111 = 7.0Fs Only default is tested; contact factory for test coverage. PA_BIAS_DLY[3:0] DESCRIPTION ______________________________________________________________________________________ 33 www.BDTIC.com/maxim MAX2851 Table 17. Main Address 27 (A[4:0] = 11011, Main Address 0 D0 = 0) MAX2851 5GHz, 5-Channel MIMO Receiver Table 19. Local Address 4 (A[4:0] = 00100, Main Address 0 D0 = 1) BIT NAME BIT LOCATION (D0 = LSB) DESCRIPTION RFDET_MUX_SEL[2:0] D[9:7] RF RSSI channel selection. 000 = Rx1 001 = Rx2 010 = Rx3 011 = Rx4 100 = Rx5 101 = Do not use 110 = Do not use 111 = Not selected (default) RESERVED D[6:0] Reserved bits—set to default. Table 20. Local Address 27 (A[4:0] = 11011, Main Address 0 D0 = 1) BIT NAME BIT LOCATION (D0 = LSB) RESERVED D[9:3] TX_AMD_BB_GAIN D2 TX_AMD_RF_GAIN D[1:0] DESCRIPTION Reserved bits—set to default. Tx calibration AM detector baseband gain. 0 = Minimum gain (default) 1 = Minimum gain + 5dB Tx calibration AM detector RF gain. 00 = Minimum gain (default) 01 = Minimum gain + 14dB rise at output 1x = Minimum gain + 28dB rise at output 34 ������������������������������������������������������������������������������������� www.BDTIC.com/maxim 5GHz, 5-Channel MIMO Receiver RXRF1 INPUT 40MHz XTAL 22pF 1:2 1nF 6.6pF + GND 68 67 66 65 64 63 62 61 60 59 58 VCC_LNA2 56 55 54 53 1 CRYSTAL OSCILLATOR/ BUFFER RSSI MAX LPF1/Q1 2 52 51 50 CLKOUT CLKOUT2 1nF 1:2 RXRF2- TXRFQ 3 49 BB PA_DET RSSI RF RSSI RXRF2+ LNA2 4 22pF PHASE-LOCKED LOOP LPF1/Q2 VCC_MXR1 LNA1-5 LPF1/Q1-5 5 1nF RXRF3- RXRF3+ DOUT VCC_DIG 0.1µF 47 46 6 1nF 1:2 48 TXRFQ VCC_LNA3 RXRF3 INPUT VCC_XTAL XTAL XTAL_CAP RSSI RXBBI2+ RXBBI257 LNA1 RXRF2 INPUT 1.0µF 39pF RXBBQ2+ RXBBQ2- VCC_BB1 RXBBI1+ RXBBI1- RXBBQ1+ 0.1µF RXBBQ1- VCC_LNA1 RXRF1+ RXRF1- ENABLE 1nF CPOUT- CPOUT+ 380I PLL LOOP FILTER 2.2nF 33pF 380I LNA3 7 45 LPF1/Q3 8 MAX2851 TXRFQ 44 GND_VCO BYP_VCO 1µF 22pF VCC_MXR2 90˚ 43 9 1nF 10 RXRF4- RXRF4+ 42 LNA4 47pF 1:2 1nF 0˚ PA_DET RXRF4 INPUT VCC_VCO LPF1/Q4 41 11 TXRFQ 12 40 TXRFQ 0˚ AM DETECTOR 90˚ 22pF VCC_LNA4 13 39 RXBBQ3- RXBBQ3+ RXBBI3- RXBBI3+ 1nF VCC_UCX PA_BIAS 0.75pF AMD 14 DOUT 1:2 TXRF OUTPUT TXRF+ SERIAL INTERFACE 38 37 15 DIN SCLK 2.2nH LNA5 16 36 LPF1/Q5 AMD 17 35 CS RXBBQ4- TXRFQ 32 33 34 RXBBQ4+ 31 RXBBI4- 30 RXBBI4+ 29 TXBBQ- 28 TXBBQ+ 27 TXBBI- 26 TXBBI+ 25 RXBBQ5- 24 RXBBQ5+ 23 RXBBI5- 22 RXBBI5+ 21 GND VCC_UCX 1nF 20 RXRF5+ 19 VCC_LNA5 18 RXRF5- VCC_PA_BIAS 1nF VCC_BB2 TXRF1nF 0.1µF 1nF 1:2 22pF RXRF5 INPUT ______________________________________________________________________________________ 35 www.BDTIC.com/maxim MAX2851 Typical Operating Circuit MAX2851 5GHz, 5-Channel MIMO Receiver Chip Information PROCESS: BiCMOS Package Information For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. PACKAGE TYPE PACKAGE CODE Document No. 68 TQFN-EP T6800+2 21-0142 36 ������������������������������������������������������������������������������������� www.BDTIC.com/maxim 5GHz, 5-Channel MIMO Receiver REVISION NUMBER REVISION DATE 0 1/10 Initial release 1 3/10 Modified EC table to support single-pass room test flow DESCRIPTION PAGES CHANGED — 2, 3, 5, 6–9 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2010 Maxim Integrated Products 37 Maxim is a registered trademark of Maxim Integrated Products, Inc. www.BDTIC.com/maxim MAX2851 Revision History