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BF P410 BDTIC In ves ti gat i on o f P ha s e N oi s e i n K uBan d DR Os us i ng BF P410 Phas e noi s e pe rfo r ma nc e vs . c ol l ec to r c urre nt Appl i c ati o n N ote A N 235 Revision: Rev. 1.0 2010-08-11 RF and P r otec ti on D evi c es www.BDTIC.com/infineon BDTIC Edition 2010-08-11 Published by Infineon Technologies AG 81726 Munich, Germany © 2010 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. www.BDTIC.com/infineon BFP410 BFP410 Phase Noise in DROs Application Note AN235 Revision History: 2010-08-11 Previous Revision: prev. Rev. x.x Page Subjects (major changes since last revision) BDTIC Trademarks of Infineon Technologies AG A-GOLD™, BlueMoon™, COMNEON™, CONVERGATE™, COSIC™, C166™, CROSSAVE™, CanPAK™, CIPOS™, CoolMOS™, CoolSET™, CONVERPATH™, CORECONTROL™, DAVE™, DUALFALC™, DUSLIC™, EasyPIM™, EconoBRIDGE™, EconoDUAL™, EconoPACK™, EconoPIM™, E-GOLD™, EiceDRIVER™, EUPEC™, ELIC™, EPIC™, FALC™, FCOS™, FLEXISLIC™, GEMINAX™, GOLDMOS™, HITFET™, HybridPACK™, INCA™, ISAC™, ISOFACE™, IsoPACK™, IWORX™, M-GOLD™, MIPAQ™, ModSTACK™, MUSLIC™, my-d™, NovalithIC™, OCTALFALC™, OCTAT™, OmniTune™, OmniVia™, OptiMOS™, OPTIVERSE™, ORIGA™, PROFET™, PRO-SIL™, PrimePACK™, QUADFALC™, RASIC™, ReverSave™, SatRIC™, SCEPTRE™, SCOUT™, S-GOLD™, SensoNor™, SEROCCO™, SICOFI™, SIEGET™, SINDRION™, SLIC™, SMARTi™, SmartLEWIS™, SMINT™, SOCRATES™, TEMPFET™, thinQ!™, TrueNTRY™, TriCore™, TRENCHSTOP™, VINAX™, VINETIC™, VIONTIC™, WildPass™, X-GOLD™, XMM™, X-PMU™, XPOSYS™, XWAY™. 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Last Trademarks Update 2009-10-19 www.BDTIC.com/infineon Application Note AN235, Rev. 1.0 3 / 12 2010-08-11 BFP410 BFP410 Phase Noise in DROs List of Content, Figures and Tables Table of Content 1 1.1 Overview ............................................................................................................................................. 5 Test Setup ............................................................................................................................................ 6 2 Test Results ........................................................................................................................................ 7 Author ................................................................................................................................................ 11 List of Figures Figure 1 Figure 2 Figure 3 Figure 4 Figure 5 Figure 6 Figure 7 Figure 8 Figure 9 Flicker Noise Performance of BFP410 ................................................................................................. 5 Setup for Measuring Phase Noise. ...................................................................................................... 6 7 8 Phase Noise at 7.5 mA – logarithmic plot ............................................................................................ 8 Phase Noise at 9 mA – logarithmic plot ............................................................................................... 9 Phase Noise at 11 mA – logarithmic plot ............................................................................................. 9 Phase Noise at 14 mA – logarithmic plot ........................................................................................... 10 Phase Noise at 20 mA – logarithmic plot ........................................................................................... 10 BDTIC List of Tables Table 1 Phase Noise vs. DC current and offset frequency ............................................................................... 7 www.BDTIC.com/infineon Application Note AN235, Rev. 1.0 4 / 12 2010-08-11 BFP410 BFP410 Phase Noise in DROs Overview 1 Overview This application note shows how different DC supply currents affect the phase noise of a DRO. One parameter strongly affecting the phase noise performance is the flicker noise (1/f - noise) of the transistor used as the active element in the oscillator circuit. Other parameters are loaded Q of the resonator or the Noise Factor F, for example. Figure 1 shows the 1/f-noise of Infineon’s BFP410 bipolar transistor for different collector currents over frequency. It can clearly be seen that reducing the collector current results in lower 1/f-noise. The question that led to this application note was how much will the phase noise performance of a DRO improve when the current consumption of the transistor is reduced. BDTIC BFP410 1/f-noise (VCE=3V, RG=2kΩ, Ω, TA=25°C, IC: Parameter) 50 45 5 mA 10 mA 40 15 mA 35 20 mA NF [dB] 30 25 20 15 10 5 0 10 100 1000 10000 100000 f [Hz] Figure 1 Flicker Noise Performance of BFP410 www.BDTIC.com/infineon Application Note AN235, Rev. 1.0 5 / 12 2010-08-11 BFP410 BFP410 Phase Noise in DROs Overview 1.1 Test Setup The current consumption of BFP410 in the LNB that was used for testing was changed by modifiying the values of the biasing resistors. Current consumption was calculated by checking the voltage drop over a resistor connecting from Vcc to the transistor’s collector. A block diagram of the test setup that was used for measuring phase noise is displayed in the next picture. The LNB was powered with a standard lab DC source. All components on the LNB were running as they would do in normal operation when receiving satellite signals. The signal of the 9.75 GHz DRO was monitored using a horn antenna. The signal couples through the closed cover of the LNB. Having the cover open would have extremely affected the behavior of the LNB. But even with closed lid the DRO’s signal was strong enough to be easily detected. BDTIC A RF amplifier was used to boost signal strength so there was enough dynamic range to perform the actual phase noise measurement with a spectrum analyzer. Figure 2 Setup for Measuring Phase Noise. www.BDTIC.com/infineon Application Note AN235, Rev. 1.0 6 / 12 2010-08-11 BFP410 BFP410 Phase Noise in DROs Test Results 2 Test Results The following pages show the results of the phase noise measurements at different currents. It can be seen that there is a phase noise minimum when adjusting the collector current to about 11 mA. Furtherly reducing the current results again in increasing phase noise figures. Table 1 Phase Noise vs. DC current and offset frequency Phase Noise / (dBc/Hz) at offset frequency of: DC current / mA 7.5 1 kHz 9 11 10 kHz 100 kHz BDTIC -72.8 -98.6 -107.9 -75.3 -99.1 -109.5 -78.4 -100.3 -109.7 14 -74.8 -98.8 -110.3 20 -66.7 -94.1 -110.0 Phase Noise vs. Offset Frequency -60 -70 Phase Noise / (dBc/Hz) -80 20mA -90 14mA 11mA 9mA 7.5mA -100 -110 -120 1 10 100 Offset Frequency / kHz Figure 3 www.BDTIC.com/infineon Application Note AN235, Rev. 1.0 7 / 12 2010-08-11 BFP410 BFP410 Phase Noise in DROs Test Results Phase Noise vs. Current -65 -70 -75 Phase Noise / (dBc/Hz) -80 -85 -90 1kHz 10kHz -95 100kHz BDTIC -100 -105 -110 -115 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Icc / mA Figure 4 Figure 5 Phase Noise at 7.5 mA – logarithmic plot www.BDTIC.com/infineon Application Note AN235, Rev. 1.0 8 / 12 2010-08-11 BFP410 BFP410 Phase Noise in DROs Test Results BDTIC Figure 6 Phase Noise at 9 mA – logarithmic plot Figure 7 Phase Noise at 11 mA – logarithmic plot www.BDTIC.com/infineon Application Note AN235, Rev. 1.0 9 / 12 2010-08-11 BFP410 BFP410 Phase Noise in DROs Test Results BDTIC Figure 8 Phase Noise at 14 mA – logarithmic plot Figure 9 Phase Noise at 20 mA – logarithmic plot www.BDTIC.com/infineon Application Note AN235, Rev. 1.0 10 / 12 2010-08-11 BFP410 BFP410 Phase Noise in DROs Author Author Dietmar Stolz, Staff Engineer of Business Unit “RF and Protection Devices” BDTIC www.BDTIC.com/infineon Application Note AN235, Rev. 1.0 11 / 12 2010-08-11 BDTIC w w w . i n f i n e o n . c o m www.BDTIC.com/infineon Published by Infineon Technologies AG AN235